This paper presents an integrative application of several numerical analytical techniques and associated analysis tools for design optimization and damage prediction in electronics packages and microsystems. This design-for-reliability approach is based on four different types of numerical techniques that allow (1) high-fidelity modelling, (2) reduced order modelling, (3) numerical optimization and (4) uncertainty analysis. The capabilities and the characteristics of the methods that underpin these four types of modelling and analysis tools are firstly investigated. The integration of the methods and tools is then examined and a methodology for coupling the tools in an optimization process is proposed. This numerical methodology involves the following steps: (1) Define sampling points for the design of interest by design of experiments (DOE) and calculate the design response at each DOE point using high-fidelity analysis; (2) construct reduced order models (ROM) for fast analysis using the obtained response values at the DOE points; (3) Undertake deterministic optimization in the defined design space by ROM; and (4) Probabilistic optimization by including variation and uncertainty of the design in the optimization task. This approach is suitable to address design-for-reliability requirements at early design stages in a wide range of application areas. The application of this approach is demonstrated in a case for minimizing the thermal fatigue damage of flip-chip solder interconnects. Design modifications show that this approach can provide improved reliability of the package and in the same time satisfy a number of design requirements.
A SiC thin film grown by propane carbonization of a Si(111) substrate has been characterized by transmission electron microscopy and scanning electron microscopy techniques. This study reveals the presence of planar defects in the SiC layer and voids in the Si(111) substrate as well as misfit dislocations at the SiC/Si interface. The resulting SiC layer consists of a mosaic structure and is shown to have low stress.
A 3C-SiC compliant substrate technology for III-Nitrides materials has been developed by the carbonization of a semiconductor-on-insulator (SOI) structure, in this instance device quality (111) Si on SiO2. The subsequent growth of GaN on the 3C-SiC SOI produced highly oriented wurtzitic material with properties similar to those of GaN on sapphire. A preliminary parametric study of growth behavior has been completed and several characterization techniques have been used to investigate the properties of the GaN layers on 3C-SiC SOI. A corrected XRD FWHM of similar to 360 arcsec has been obtained for the (0002) reflection. At low excitation power the photoluminescence band edge emission intensity of GaN on 3C-SiC SOI is greater than that of high quality GaN on sapphire. This work shows the feasibility and potential of 3C-SiC SOI as low cost, large area, substrate suitable for III-Nitride growth.
Si (111) semiconductor-on-insulator (SOI) structures have been converted to SiC by carbonization of the thin (<100 nm) Si layer using rapid thermal chemical vapor deposition with mixtures of propane and H2 at atmospheric pressure. Carbonization temperatures around 1225–1250 °C produced SiC films with optimum structural properties. X-ray diffraction (XRD) reveals a single SiC peak at 2θ=35.7° corresponding to the (111) reflection, with an uncorrected full width at half-maximum (FWHM) of ∼0.24°. Infrared spectroscopy of SiC SOI structures obtained under optimum carbonization conditions exhibited a sharp absorbtion peak produced by the Si–C bond at 795 cm−1, with FWHM=22–25 cm−1. Metalorganic chemical vapor deposition growth of GaN on the (111) SiC SOI was carried out with trimethylgallium and NH3 precursors at 1000 °C. XRD indicates highly oriented hexagonal GaN, with FWHM of the (0002) peak of ∼0.15°. The 300 °K photoluminescence (PL) spectrum of GaN films exhibits a strong near band-edge peak (at λp∼371 nm, with FWHM=100–150 meV) and weak yellow emission. Under low power excitation, the 370 nm PL emission from the GaN/SiC SOI structure displays an emission intensity ∼10× higher than that of equivalent GaN films grown on sapphire.
Single crystal 3C–SiC platelets, formed by thermal decomposition of methyltrichlorosilane at 1650–1750 °C, have been characterized in terms of structure and morphology. The platelets are ∼3–5 mm in length and 1–1.5 mm in thickness. The (111) C face of the crystal, which has an effective zero growth rate, presents a large, mirrorlike surface in the as-grown 3C crystals. Atomic force microscopy indicates that these as-grown surfaces are extraordinarily flat and uniform, with a mean surface roughness of 1–2 Å. This value is comparable with the roughness of state-of-art polished Si wafers. X-ray rocking curves of the 〈111〉 peak were obtained with a linewidth of 12.3 arcsec. This is the smallest value reported to date for any polytype of SiC. Raman spectroscopy at 300 K reveals a very sharp TO–phonon peak at 797.8 cm−1, with a linewidth of 2.1 cm−1.
A brief review is presented of SiC epitaxial growth by CVD from the single organosilane precursor silacyclobutane (SCB). The growth of SiC films on various substrates (Si, Si SOI, and 6H SIG) is discussed. Results from analytical and characterization tests are reported that demonstrate the quality of the SiC epitaxial thin film obtained from CVD growth with SCB.