LLM-based generative AI requires high-capacity and high-bandwidth memory. We propose an HBM4 with 2048 I/Os, 3.3TB/s bandwidth, and 36GB cube density. Core die uses the 6th gen. DRAM and the base die uses a 4nm Fin-FET process. TSV count and data window are doubled for high-frequency margin. tCCDR is improved via per-channel TSV-RDQS auto calibration, enhancing rank-to-rank access. PMBIST enables at-speed testing in CoW and SiP. The on-die WDQS skew cancellation ensures robust timing, enabling reliable highspeed operation and improved yield.

LLM-based generative AI requires high-capacity and high-bandwidth memory. We propose an HBM4 with 2048 I/Os, 3.3TB/s bandwidth, and 36GB cube density. Core die uses the 6th-gen. DRAM and the base die uses a 4nm Fin-FET process. TSV count and data window are doubled for high-frequency margin. t(CCDR) is improved via per-channel TSV-RDQS auto calibration, enhancing rank-to-rank access. PMBIST enables at-speed testing in CoW and SiP. The on-die WDQS skew cancellation ensures robust timing, enabling reliable highspeed operation and improved yield.

The surge in cyber incidents such as the SolarWinds, Log4j, and MOVEit attacks, underscores the need for a comprehensive supply chain cybersecurity framework. It is particularly important for critical infrastructure, such as nuclear facilities, where a breach could have catastrophic human and environmental consequences. This study defines the necessary scope of supplier organizational and linkage security management throughout the entire lifecycle of nuclear facilities. A comparative analysis is then conducted with Korean nuclear cybersecurity regulations, focusing on the regulatory standard KINAC/RS-015 and its 101 cybersecurity controls. Certain controls requiring supplier organizational and linkage security serve as a solid foundation for comprehensive supply chain cybersecurity management. The controls within the development organizational security scope are generally well established, which is encouraging given the growing emphasis on secure software development and continuous vulnerability management. Some deficiencies are also identified. The current framework primarily focuses on the licensee, outlining cybersecurity implementation from its perspective. As a result, regulations remain largely confined to activities within nuclear facilities and impose few explicit requirements on suppliers. However, given the inevitability of supply chain threats, the regulatory focus must extend beyond nuclear facilities to ensure their safety.

Optimizing the positions of decoupling capacitors (decaps) is critical for the design of power delivery networks (PDNs). Conventional methods typically employ fixed via positions, limiting design flexibility and often yielding suboptimal impedance performance. This study proposes a hierarchical genetic algorithm that simultaneously optimizes via positions and decap positions and types to achieve the target impedance while reducing the number of decaps used. The proposed method first selects via positions over a large search space, and the decap optimization is subsequently conducted on the selected vias. A precomputed inductance look-up table (LUT) is employed to accelerate impedance calculation during the iterative optimization process. The simulation and measurement results validate the accuracy of the impedance estimation and demonstrate that the proposed co-design method achieves the target impedance, which the conventional fixed-via method fails to satisfy. This study highlights the importance of considering via and decap co-design in practical PDN optimization.

An efficient optimization method for designing defected ground structure (DGS)-based common-mode filters (CMFs) is proposed, utilizing equation-based transmission line models integrated with a genetic algorithm (GA). Designing an optimal DGS-based CMF using full-wave simulation tools is time-consuming due to its process-intensive nature. The proposed optimization method implements transmission line theory to allow for direct S-parameter calculation, enabling integration with an optimization algorithm to identify optimal parameters within a confined 5 mm × 10 mm design space. This work demonstrates a compact asymmetric DGS design to illustrate the method’s capability. The resulting compact asymmetric DGS-based CMF achieves wideband common-mode suppression with a –10 dB bandwidth from 3.18 GHz to 12.89 GHz. The optimization method significantly reduces design time by minimizing the need for lengthy and repetitive full-wave simulations. The measured S-parameters of the fabricated CMF closely match the simulated results, validating the model’s accuracy. Compared with traditional methods for designing DGS-based CMFs, the proposed method utilizes transmission line theory to optimize the design efficiently, providing a practical and efficient solution.

A novel method for suppressing differential-to-common-mode conversion on bent differential transmission lines using backdrills is proposed. In contrast to conventional methods that require design changes or additional components, the proposed method can be implemented after fabrication on existing PCBs by applying backdrilling. The method employs parametric optimization of drill diameter (d(drill)) and drill hole count (N) using ANSYS Q3D simulations to maximize the phase velocity difference between the differential lines (Av(pi),((i,o))). The design with optimized backdrills maintains a 180 degrees phase difference from DC-15 GHz, effectively suppressing differential-to-common-mode conversion. The simulated results validate the optimal backdrill configuration enhancing the signal integrity of the system, confirming the method's efficacy in suppressing differential-to-common-mode conversion.

This paper compares the performance of deep neural networks(DNN) applied to antenna arrays with different element counts(8, 16, 32). The DNNs were designed using fully connected(FC) layers, comprising input, hidden, and output layers. Each hidden layer includes a single FC layer and a rectified linear unit(ReLU) activation function. Results indicate that blind beamforming with DNNs performs well with fewer elements but degrades as the number of elements increases due to increased nonlinearity, complicating training. State-of-the-art defense radar systems require many array elements, making current research insufficient. To effectively apply DNN-based blind beamforming to these large arrays, further research is needed to address the signal-to-interference noise ratio(SINR) performance degradation associated with larger array elements.

With the increasing use of AI in radar signal processing, researchers have started combining minimum variance distortionless response (MVDR) with AI technology; however, the use of MVDR results in higher nonlinearity, making the learning process difficult. A combination of null-space beamforming (NSB) and AI technology may be a solution to this issue. However, inferring NSB weights requires inputting prior angle information, which necessitates an additional direction of arrival estimation, thereby increasing system complexity. To meet the requirements for applications in radar systems, we present a robust anti-jamming method for large-array radar systems using a deep neural network with NSB (DNN-NSB). The proposed method combines the computational simplicity of null-space beamforming with the adaptability of deep learning to effectively suppress interference and maintain a high signal-to-interference-plus-noise ratio (SINR). Unlike traditional methods, DNN-NSB eliminates the need for prior angle information, enabling efficient and scalable weight inference even in complex scenarios. The performance of DNN-NSB was validated through simulations across four scenarios by varying the number of interference sources, interference-to-signal ratio (ISR) conditions, and array sizes. The results showed that DNN-NSB consistently achieved near-optimum SINR within the training range and demonstrated superior performance compared to a convolutional neural network based on MVDR (CNN-MVDR) under multi-source interference conditions. To evaluate scalability, the model was further tested using a 32-element array, where it consistently achieved near-optimum interference suppression and maintained high spatial resolution. In conclusion, the study findings highlight the potential of DNN-NSB as a practical and effective solution for modern radar systems, particularly for applications that require large arrays and robust anti-jamming capabilities.

This article proposes a fully integrated single-crystal oscillator (XO)-based clock management IC (CMIC) with three key features for 5G cellular mobile devices. First, to reduce fabrication cost by eliminating a 32.768-kHz crystal, an on-chip real-time clock (RTC) using a machine-learning (ML)-based RC oscillator (RCO) calibration is proposed for the excellent frequency stability of the RTC; thus, it achieves a 0.68-ppm/ $^{\circ}$ C stability, nearly comparable to that of an RTC crystal, with the power consumption of 48.2 $\mu $ W. Second, to extend battery life through a fast start-up operation of the XO, the sampling phase-locked loop (S-PLL)-based injection technique reduces the start-up time and energy by 18.2 and 8.8 times, respectively, despite a high swing of 1.2 V. Finally, to mitigate a phase noise (PN) degradation according to a capacitive load ( $\rm {\rm C_{L}})$ -trimming of XO for the temperature compensation, a $\rm {\rm C_{L}}$ -dependent feedback resistor adjusting a 4kTR noise through a pulsewidth modulation is also proposed; thus, the 76.8-MHz XO accomplishes a PN of less than $-$ 158.2 dBc/Hz at 100-kHz offset while consuming the power of 1.08 mW. Consequently, the proposed single-XO-based CMIC meets all reference clock requirements of the system-on-chipset (SoC) and RF chipsets for 5G frequency range (FR)1 and FR2 communication.

Charitable fundraising increasingly relies on online crowdfunding platforms. Project images of charitable crowdfunding use emotional appeals to promote helping behavior. Negative emotions are commonly used to motivate helping behavior because the image of a happy child may not motivate donors to donate as willingly. However, some research has found that happy images can be more beneficial. These contradictory results suggest that the emotional valence of project imagery and how fundraisers frame project images effectively remain debatable. Thus, we compared and analyzed brain activation differences in the prefrontal cortex governing human emotions depending on donation decisions using functional near-infrared spectroscopy, a neuroimaging device. We advance existing theory on charitable behavior by demonstrating that little correlation exists in donation intentions and brain activity between negative and positive project images, which is consistent with survey results on donation intentions by victim image. We also discovered quantitative brain hemodynamic signal variations between donors and nondonors, which can predict and detect donor mental brain functioning using functional connectivity, that is, the statistical dependence between the time series of electrophysiological activity and oxygenated hemodynamic levels in the prefrontal cortex. These findings are critical in developing future marketing strategies for online charitable crowdfunding platforms, especially project images.

Typical convolutional neural networks (CNNs) are widely used to recognize a user's stress state using the functional near-infrared spectroscopy (fNIRS), which is the latest brain imaging technology. fNIRS signals are usually fed into CNN models in the form of high-dimensional image data. However, this approach is not easy to achieve high classification accuracy because of physiological noises in brain signals. It is also likely to overlook the process of evaluating the reliability of calculated classification accuracy. To solve these problems, we proposed a memristor-based CNN (M-CNNs) This model's weight update process involves using stochastic gradient descent with momentum (SGDM), where the normalized conductances of memristors are used as weight substitutes. These conductances are then adjusted to classify stress states. We calculated the classification accuracies between the control and stress groups by using the M-CNNs, and then compared them with those of the CNNs. We used DenseNet, the most recent CNN model, to simulate accuracy under the same conditions. To ensure a fair comparison, we divided the DenseNet into the memristor-based DenseNet (M-DenseNet) and the conventional DenseNet (C-DenseNet). As a result, we discovered that the accuracy of M-CNNs (93.33%) exceeded that of CNNs (87.50%), and is reliable by precision, recall, and F-Score calculated from a confusion matrix. Likewise, M-DenseNet (92.38%) has higher accuracy than C-DenseNet (90.00%), but shows lower accuracy than M-CNNs. Moreover, we observed the reproducibility of M-CNN/DenseNet in various datasets. Therefore, our study suggests a promising application of CNN by combining conductances of memristor for classifying stress states.

In this article, we introduce a new dynamically biased ring amplifier that is tolerant to mismatch and PVT variation without requiring bias calibration, and we verify it in a 12-bit 400-MS/s pipelined-SAR analog-to-digital converter (ADC), fabricated in an 8-nm FinFET process. Our novel ring amplifier solves the biasing issues inherent in conventional ring amplifiers while maintaining the benefits of high gain, slew-based charging, and nearly rail-to-rail output swing. We also propose a technique to enhance the DC accuracy of a switched-capacitor common-mode feedback (CMFB) without consuming additional power, which we named feedback voltage sampling CMFB. Furthermore, we introduce a full-scale matching residue amplification technique for the prototype pipelined-SAR ADC to utilize the top-plate input sampling for the first-stage SAR ADC, resulting in faster and lower power conversion. The prototype ADC demonstrates the robustness of our dynamically biased ring amplifier to mismatch and PVT variation without any interstage gain, bias, or reference calibration, and achieves 64.4-dB SNDR and 77.6-dB SFDR for a low-frequency input while consuming 2.08 mW. This measured performance is equivalent to Walden and Schreier FoMs of 3.8 fJ/conversion- step and 174.2 dB, respectively.

Optimizing the placement of decoupling capacitors (decaps) is crucial in power delivery network (PDN) design, yet it poses challenges due to the large search space. In this paper, we present a dual-structure genetic algorithm (GA)-based optimization method that optimizes both via placement and decap configurations to achieve the target impedance while minimizing the number of capacitors used. The resulting design exhibits a lower cost function compared to previous methods that optimizes decaps at fixed locations, displaying enhanced optimization performance.

In order to mitigate 1/f noise and DC offset with less area overhead, the low-intermediate-frequency (low-IF) architecture is widely chosen for energy efficient wireless communication systems, such as Bluetooth Low Energy (BLE) and IoT. The low-IF architecture typically requires filters for anti-aliasing and image rejection to suppress aliasing from the adjacent channels. The use of the continuous-time delta-sigma modulator (CTDSM) ADC makes the low-IF receivers more efficient with its inherent anti-aliasing property. In addition, by shifting the noise transfer function (NTF) we can optimize the order and sampling speed of the CTDSM ADC to minimize the in-band quantization noise [1]. We present a sixth-order CTDSM that maximizes power efficiency by implementing the integrator using a single-amplifier quadrature biquad (SAQB) filter and low-IF shifted NTF-based quadrature-noise shaping SAR (QNSSAR) using dynamic amplifier (Fig. 9.6.1). Our quadrature DSM operates at an 80MHz sampling rate with 4MHz input bandwidth, and achieves 74.7dB SNDR with 0.88mW, resulting in a 171.3dB Schreier FoM.

The big-data platforms such as data centers and servers require high-speed, high-density, and low-energy dual in-line memory module (DIMM) including an array of DRAMs mounted on a small board in Fig. 1. Each DRAM is working based on the double data rate (DDR) memory interface to accomplish $2 x$ speed compared to its counterpart, single data rate (SDR). However, the rapidly growing CPU speed has needed more the number of DRAMs on the DIMM board, leading to a necessity of a registering clock driver (RCD) IC [1]. It plays a critical role in connecting the CPU and 40EA DRAMs through a time-interleaved DRAM operation by segmenting the the DIMM board to 2-channels (A, B) and 2-groups (A, B). In other words, the RCD IC should enhance the timing synchronization among memory modules by refining the command-address ($\mathrm{D}_{\mathrm{CA}}$) data and the chip-selection ($\mathrm{D}_{\mathrm{cs}}$) data along with the differential clock ($\mathrm{D}_{\mathrm{ck}}$) from the CPU. Additionally, it significantly contributes to the system stability improvement by ensuring the consistent signal transmissions, but the bandwidth evolution to $4^{\text {th }}$-generation ($7.2 \mathrm{GT} / \mathrm{s}$) causes formidable challenges in processing 7-bit Dca, 2-bit Dcs and 1-differential Dck and transmitting refined 14bit Qca, 2-bit Qcs and 2-differential Qck with the minimal pin-to-pin skew ($\lt \pm 2.5 \mathrm{ps}$) to 40EA DRAMs. To overcome these issues, we present a $7.2 \mathrm{GT} / \mathrm{s}$ RCD IC for the DDR5 DIMM. The proposed timing calibration strategy based on a PVT-insensitive digital-to-time converter (DTC) and a phase-interpolator (PI)-offset control ensures stable data processing of $\mathrm{D}_{\mathrm{CA}}$ and $\mathrm{D}_{\mathrm{cs}}$. The PI-imbedded PLL mitigates the timing slack through jitter-filtering of Dck input (4.72 to $0.20 \mathrm{ps} r \mathrm{~ms}$ at 3.6 GHz). Additionally, the auxiliary-DAC (A-DAC)-based current-mode PI (CMPI) compensates for phase and amplitude distortions of the conventional CMPI, yielding $\mathbb{N L}_{p-p}$ of ${\lt}1.06 \mathrm{LSB}$ at 3.6GHz. Finally, the proposed skew calibration strategy allocating an additional PI-offset control per group and a DTC per pin allows the skew to be $\lt \pm 1.6$ ps.

This letter presents a fully integrated wireless direct sampling receiver (DSR) that covers from dc to 200-MHz system bandwidth implemented with a single-channel SAR ADC in 14-nm FinFET. To demonstrate the proposed architecture, frequency modulation (FM) among the applicable standard frequency bands is adopted as a prototype. The measured demodulated SNR is 73.9 dB with −47-dBm input power at 108 MHz and the sensitivity level is −106 dBm. The proposed DSR shows a robust performance over a 30-dB-demodulated SNR even in the presence of the interference, such as a strong adjacent channel and an in-band spur. Furthermore, the FM channel scan time is drastically reduced since the proposed receiver simultaneously samples all channels without adjusting analog building blocks.

We propose bandpass filters (BPFs) with mixed electromagnetic coupling paths (MEMCPs) that comprise two coupled vertical split-ring resonators (VSRRs) and present the equivalent circuit models of the coupled VSRRs. We demonstrate that the dominant coupling modes for the top and bottom layers of the VSRRs are magnetic (M) and electric (E), respectively, and that M-dominant coupling is required for high-selectivity BPFs. BPFs with narrow and wide bandwidths were designed based on the generalized coupling matrix. The proposed BPFs were fabricated and measured, and it is verified that the proposed BPFs have high selectivity due to the transmission zeros and a small circuit footprint due to the vertical structure of resonators. The fabricated narrow- and wide-band BPFs have the fractional bandwidths of 3.62% and 5.81%, respectively, with the overall size of 0.29λg×0.043λg.

Recent advances in functional neuroimaging techniques, including methodologies such as fNIRS, have enabled the evaluation of inter-brain synchrony (IBS) induced by interpersonal interactions. However, the social interactions assumed in existing dyadic hyperscanning studies do not sufficiently emulate polyadic social interactions in the real world. Therefore, we devised an experimental paradigm that incorporates the Korean folk board game “Yut-nori” to reproduce social interactions that emulate social activities in the real world. We recruited 72 participants aged 25.2 ± 3.9 years (mean ± standard deviation) and divided them into 24 triads to play Yut-nori, following the standard or modified rules. The participants either competed against an opponent (standard rule) or cooperated with an opponent (modified rule) to achieve a goal efficiently. Three different fNIRS devices were employed to record cortical hemodynamic activations in the prefrontal cortex both individually and simultaneously. Wavelet transform coherence (WTC) analyses were performed to assess prefrontal IBS within a frequency range of 0.05–0.2 Hz. Consequently, we observed that cooperative interactions increased prefrontal IBS across overall frequency bands of interest. In addition, we also found that different purposes for cooperation generated different spectral characteristics of IBS depending on the frequency bands. Moreover, IBS in the frontopolar cortex (FPC) reflected the influence of verbal interactions. The findings of our study suggest that future hyperscanning studies should consider polyadic social interactions to reveal the properties of IBS in real-world interactions.

A method using 3D-printed dielectric materials is proposed to suppress differential-to-common-mode noise conversion in right-angle-bent differential transmission lines. The permittivity of the 3D-printed dielectric material decreases the phase velocity of the shorter inner line of the differential transmission lines. Decreasing the phase velocity of the inner line enables the transmission line phase difference to approach 180°, suppressing differential-to-common-mode noise conversion. Simulation shows that increasing the length of the dielectric material causes a decrease in the phase velocity of the transmission line, suppressing differential-to-common-mode noise. The measured results agree with the simulation, indicating suppression in Scd21. The eye height of the eye diagram improved by 19.63%, improving the system signal integrity.