We present a model of quantum teleportation protocol based on one-dimensional quantum dots system. Three quantum dots with three electrons are used to perform teleportation, the unknown qubit is encoded using one electron spin on quantum dot A, the other two dots B and C are coupled to form a mixed space-spin entangled state. By choosing the Hamiltonian for the mixed space-spin entangled system, we can filter the space (spin) entanglement to obtain pure spin (space) entanglement and after a Bell measurement, the unknown qubit is transferred to quantum dot B. Selecting an appropriate Hamiltonian for the quantum gate allows the spin-based information to be transformed into a charge-based information. The possibility of generalizing this model to N-electrons is discussed.
In the nanometer structure, the island with discrete energy spectrum should be considered. The transport characteristics of an electromechanical quantum dots device at zero temperature are investigated by using Monte Carlo method. An indirect and effective method is applied to estimate the trend of the current curves, by analyzing the average electrostatic forces. The current–voltage curves show the Coulomb blockade phenomena, which is the result of the interaction between discrete levels and the island vibration.
Nonequilibrium Green’s function formalism can be used to analyze the small-signal ac response of nanoscale devices of one or two dimensional model by introducing internal-induced ac potential. This makes it possible to analyze the small-signal ac response of ultra-small ballistic MOSFETs. Working on the 2D model of nanoscale double-gate MOSFETs, the present paper calculated the cut-off frequencies and transconductance per current with various channel lengths and gate dielectric constants. It turns out that the cut-off frequencies of ultra-small ballistic MOSFETs will go up without limit with increasing drain currents, which is in contrast to conventional MOSFETs with scatterings. On the other hand, the cut-off frequencies are limited under 3THz due to the decreasing of transconductance per current. Secondly, operating at large drain current, the ultra-small ballistic MOSFETs with shorter channels have higher cut-off frequencies at the same drain current, while at small drain current, the longer ones have higher cut-off frequency at the same drain current.
In the single electron transistor, multiple-junction devices have different properties with two-junction devices. We investigate a model system of three-junction electromechanical single electron transistor at zero temperature. Comparing with two-junction electromechanical single electron transistor, the island movement has a greater influence on the electron tunneling. The current-drain voltage (IDS–VD) curve also has Coulomb Staircase phenomena. However, the conductance decreases with the increase of VG. A simple and effective method is applied to estimate the trend of the current curves, by analyzing the average electrostatic forces.
A latch based on High Temperature Superconductor Single-Hole Transistor (HTS-SHT) and High Temperature Superconductor-Normal Conductor-High Temperature Superconductor (HTS-SNS) junction is proposed in this paper. Firstly, we propose an improved HTS-SHT model based on three-state master equation method, which is comparable to Monte Carlo method in precision even in high voltage region of V-DD. Then, we present a theoretical analysis for this proposed latch, where HTS-SHT is described as this improved three-state model and HTS-SNS junction as a simplified model of Kummel-Nicolsky (KN) theory. In the proposed latch, HTS-SHT acts as a drive and HTS-SNS junction acts as a load, where we utilize the low-voltage-negative-differential-resistance (LVNDR) effect of HTS-SNS junction, and the clear Coulomb staircase of HTS-SHT having asymmetric junctions.
In this paper, in the enlightenment of nanomechanical oscillations' experiment in single-C/sub 60/ transistor, utilizing improved shuttle mechanism for charge transfer in Coulomb blockade nanostructures, we give a new model of transistor based OD C/sub 60/ by combining the resistance with the spring, and simulate the I-V/sub ds/, where we find the Coulomb blockade and Coulomb staircase, and I-V/sub g/ characteristics, where we find periodical attenuation phenomenon. And on the basis of this transistor mechanism model, we construct a new model of an amplifier with the resistant load, and give the new small-signal equivalent circuit model. Here we solve master equation with the three-state model because of its simplicity and higher precision.
In this paper, a high speed operational amplifier (op amp) with 60 nm gate length MOSFET (nano-MOSFET) is presented. Cascode input stage is implemented to improve frequency response. After verifying the availability of cascode form in designing high speed op amp via SPICE model, we give simulation results to prove the speed of cascode op amp has no advantage compared with simple two-stage op amp in this ultra-short channel occasion. Our simulation also suggest it is important to choose transistor parameter, as small output resistance can severely deteriorate circuit performance.
In this paper, we develop an improved semi-classical steady-state model for capacitively coupled Single-Electron Transistor (SET). This SET model is based on three-state steady-state master equation, but has some revision at different device parameters. And we call it as improved three-state master equation model. We calculate I-DS-U-DD, I-DS-U-G, G(DS)-U-DD characteristics at different devices parameters. We also present corresponding characteristics calculated by Monte Carlo method and full master equation method in most cases. The results demonstrate that it is comparable to Monte Carlo method and full master equation method in precision even in high voltage region Of V-DS. And it simplifies the calculation and improves the speed of numerical simulation. This model can easily be embedded to SPICE program. Of course, the validity of this embedded model depends on whether the SET can be regarded as a separate component in the circuit.
We propose a novel analog/digital (A/D) converter based on single-electron transistors (SETs) in this paper. In the proposed A/D converter, the core cell is a SET module, composed of capacitive dividers and SET-based universal literal gates. The SET-based universal literal gate is similar to the well-known Tucker's inverter (J.R. Tucker, J. Appl. Phys., vol. 72, no. 9, pp. 4399-4413, 1992), but here it acts as digital conversion and the inputs of upper-SET and lower-SET are two opposite voltages. In the SET-based universal literal gate, by adjusting the some parameters, the output having about 50% duty ratio of square-wave-like and zero-output for zero-input (in contrast, high-voltage output for zero-input in Tucker's inverter) is obtained, where we fully utilize the periodic oscillation of SETs on gate voltage (/spl I.bar/V/sub G/=e/C/sub G/). We demonstrate the basic function of a 4-bit SET-based A/D converter using the MOSES program developed by K.K. Likharev's group, which is based on the so-called orthodox theory and Monte Carlo method. The results may be easily extended to higher-bit A/D converters.
Linear response model of semiconductor silicon single electron transistor (Si-SET) is studied. The Coulomb island of the Si-SET with a discrete level spectrum is weakly coupled to two electron reservoirs via barriers of nano-tunneling junction. The reservoirs, named source and drain electrodes respectively, are taken to be in thermal equilibrium at temperature T and Fermi energy E.. The Si-SET is considered to be driven in linear response, i.e., the conductance 0 is defined as G = I/V in the limit V tends to 0. We analyze the conductance characteristics of the Si-SET, which make it possible to simulate circuit characteristics of the Si-SET from physical parameters.
In this paper, we give a novel choice of nanometer scale inverter. It is based on a nano-MOSFET as a drive transistor and a metallic-based SET (single electron transistor) as a load. The nano-MOSFET is assumed to have intrinsic silicon channel and metal source/drain. Applying a simple method based on ballistic transportation, the device characteristics can be determined. On the other hand, SET, the device operating on the principle of Coulomb blockade effects, can be realized on a metallic base. By connecting the SET gate to its source, we can treat it as a normal resistance. Our simulation proved the two devices cooperated very well and we got the ideal characteristics of this inverter. These results are then compared with another form of inverter that we presented previously, and we conclude the advantages of both circuits at the end of the paper.
In this paper, by exploring the negative differential conductance (NDC) of a resonant interband tunneling diode (RITD), e.g. InAs/AsSb/GaSb, and the interaction between metallic nano-dots, we present and demonstrate a theoretical model of a novel bi-stable and 4-stable operation on the basis of the three-dimensional (3D) nano-electron cell which consists of metallic nano-dots forming into compact and two-dimension (2D) arrays on the surface of RITDs. We present a simplified circuit model without considering single-electron effects between metallic nano-dots, where the RITD is described by a simplified physics-based model. We investigate numerical results for this 3D nano-electron cell and their dependence on the relevant parameters. At last calculations based on Monte Carlo simulation considering single-electron effects between metallic nano-dots demonstrate that our simplified model is comprehensive enough to describe this system in nature. The calculated results demonstrate it is promising for future nano-logic and nano-memory applications.
In order to adapt to the trend of surface quality assessment, the 3D topography measurement becomes more and more important. In metallurgy industry, the topography of roller affects that of cold-rolled steel sheet mainly, which makes it necessary to measure the topography of roller. On the base of traditional light section method and light scanning technique, the triangular light beam scanning method is designed and adopts linear structured light to scanning test surface and acquire height data through demodulating the surface 3D information carried from observation field. Applied with the TLBS surface topography measuring system, some 3D topography examples are given to verify the correctness and feasibility of it.
The needs to quantity and quality of cold-rolled steel sheets demanded its fine surface quality. Some efficient methods of surface measurement are introduced to construct a surface quality controlling system. Through theoretical analysis and large amount of experiments, the basic relationship between surface topography and process parameters can be established and the optimal parameters can be got to instruct to obtain more ideal surface of roller and steel sheet.
Layered structures of copper oxide HTSC may provide ultra-small capacitance and large enough resistance for single-electron tunneling between strongly superconducting layers. The single-electron transistor made by double unit cells of Bi2Sr2CaCu2O8 can be calculated on the basis of semi-classical theory for single-electron tunneling and a method developed specifically to describe the behaviors of HTSC. To achieve satisfactory simulation speed, a table-lookup scheme is proposed. The simulation results, which display fine structures, are presented. This simulation scheme can also be extended to simulate other single-electron devices made by unit cells of HTSC and single-electron circuits consisting of these devices.
We model the unit cell of Bi2Sr2CaCu2O8 as six equally spacing layers based on the layered nature of the material and solve the Hamiltonian matrix of the system in Nambu representation. The tunneling current through the junction between Cu-O planes in the unit cell is calculated and then differentiated to obtain the tunneling conductance. Our calculation results indicate that the conductance has peak values near double energy gap and characteristic fine structures. The results may be applied for accurate calculation of behaviors of single-electron devices made by unit cells of Bi2Sr2CaCu2O8.
We have proposed a new functional superconductor single electron transistor called neuron superconducting single electron transistor (Neuron — SuSET), which simulates the function of biological neurons. The new transistor is capable of executing a weighted sum calculation of multiple input signals and threshold operation based on the results of the weighted summation, The basic structure and the variable threshold characteristics of the Neuron — SuSET are described based on the semiclassical model.
We have adapted the single electron transistor SPICE (SET-SPICE) in order to introduce the device model of HTSC-single hole transistor (HTSC-SHT) into the general-purpose circuit simulator SPICE. Some results of the simulation from the SuSET-SPICE are compared with those from the Monte-Carlo reference simulator. This work is based on the semiclassical theory of the single electron tunneling effects, and provides an approach to the simulation of the large scale and hybrid circuits containing superconducting single electron devices.
The capacitor and the mesoscopic tunnel junction (CMTJ) in series coupled superconducting single electron transistor (CMTJ - SuSET) is proposed, The gate - control characteristics of the drain current (I-D) - drain voltage (V-DD) and drain current (I-D) - gate voltage (V-GG) of the CMTJ -SuSET are studied by means of the Monte Carlo simulation based on the semiclassical model. The memory effect of the CMTJ - SuSET is also discussed.
The influence of superconducting energy gap on the performance of single electron transistor as electrometer has been studied and was found out to improve its charge sensitivity. This paper mainly deals with 1-D (dimensional) HTS mesoscopic tunneling junction array made up of HTS material Tl-1223 with capacitively coupling to a ground plan. The layered nature of Tl-1223 acts as ideal SIS junctions. The influence enforced by the superconducting energy gap on the static and dynamics of such an array is studied numerically based on the "Orthodox Theory" of single electronics. The charge transfer in the means of solitons introduced by the voltage source attached to the end of the array is also discussed.