With the advancement of science and technology, human activity recognition (HAR) has emerged as an important auxiliary technology for smart homes, holding broad application prospects in security monitoring, aging at home, and human-computer interaction. An essential prerequisite for continuous HAR is the segmentation of human activities, where precise segmentation is crucial for accurate recognition. To address this issue, this article proposes a human activity segmentation method that does not require prior knowledge, i.e., an adaptive human activity multidimensional time series segmentation method based on sample entropy dual-layer hidden Markov model (SEDHM). This method primarily includes an adaptive dimension selection strategy for multidimensional sequences based on sample entropy, a multidimensional sequence segmentation algorithm based on a dual-layer hidden Markov model (HMM), and a weighted Cost function for iterative optimization of the algorithm. To validate the effectiveness and robustness of this method, this article conducts segmentation calibration of continuous human activities in a activity capture dataset using MotionBuilder. Specifically, experimental results indicate that the proposed SEDHM reduces the root mean square error (RMSE) of human activity segmentation by 14.5% compared to four other segmentation algorithms.

Agricultural pest and disease monitoring has recently become a crucial aspect of modern agriculture. Toward this end, this study investigates methodologies for implementing low-power, high-performance convolutional neural networks (CNNs) on agricultural edge detection devices. Recognizing the potential of field-programmable gate arrays (FPGAs) to enhance inference parallelism, we leveraged their computational capabilities and intensive storage to propose an embedded FPGA-based CNN accelerator design aimed at optimizing rice leaf disease image classification. Additionally, we trained the MobileNetV2 network using multimodal image data and employed knowledge distillation from a stronger teacher (DIST) as the hardware benchmark. The solution was deployed on the ZYNQ-AC7Z020 hardware platform using High-Level Synthesis (HLS) design tools. Through a combination of fine-grained pipelining, matrix blocking, and linear buffering optimizations, the proposed system achieved a power consumption of 3.21 W, an accuracy of 97.41%, and an inference speed of 43 ms per frame, making it a practical solution for edge-based rice leaf disease classification.

Convolutional Neural Networks (CNNs) are revolutionizing agriculture, finding widespread applications in tasks such as crop disease detection and yield prediction. However, their high accuracy ability often requires significant computational and memory resources, posing challenges for deployment on resource-constrained edge devices. Lightweight CNNs can reduce computational requirements but still encounter substantial memory access challenges, necessitating further optimization for practical edge deployment. Therefore, this study employed MobileNetV2 for rice leaf disease classification and adapt the model for edge computing by quantizing network parameters to 16-bit for Field-Programmable Gate Array (FPGA) storage, implementing a linear buffering method to reduce parameter read operations, thus alleviating communication bandwidth bottlenecks and improving memory utilization by 28.6 %. High Level Synthesis (HLS) tools were also applied to optimize the FPGA accelerator through loop unrolling, pipelining, and matrix partitioning, enhancing data parallelism and reuse. The optimized design was deployed on a ZYNQ-AC7Z020 FPGA platform, achieving 95.8 % classification accuracy, an inference speed of 53 ms per frame, power consumption of 3.09 W, and a throughput of 35.7 GOPS (Giga Operations Per Second). Memory usage was reduced by 47.1 % without compromising performance. This cost-effective and efficient design offers a robust solution for real-time rice leaf disease classification, balancing resource constraints and operational performance for edge applications in precision agriculture.

The tire-road friction coefficient (TRFC) is a critical parameter that significantly influences vehicle safety, handling stability, and driving comfort. Existing estimation methods based on vehicle dynamics suffer from a substantial decline in accuracy under conditions with insufficient excitation, while vision-based approaches are often limited by the generalization ability of their datasets, making them less effective in complex and variable real-driving environments. To address these challenges, this paper proposes a novel, low-cost fusion method for TRFC estimation that integrates weather conditions and road image data. The proposed approach begins by employing semantic segmentation to partition the input images into distinct regions—sky and road. The segmented images will be fed into the road recognition network and the weather recognition network for road type and weather classification. Furthermore, a fusion decision tree incorporating an uncertainty modeling mechanism is introduced to dynamically integrate these multi-source features, thereby enhancing the robustness of the estimation. Experimental results demonstrate that the proposed method maintains stable and reliable estimation performance even on unseen road surfaces, outperforming single-modality methods significantly. This indicates its high practical value and promising potential for broad application.

In today’s increasingly complex traffic environment, pedestrian detection has become increasingly important. The Histogram of Oriented Gradients (HOG) algorithm has been proven to be highly efficient in pedestrian detection. This paper proposes a low-resource consumption, high-speed hardware implementation for HOG algorithm. In the case of a slight sacrifice in accuracy, it increases computational speed and reduces resource consumption. Experimental results demonstrate that the implementation achieves a speed of 0.933 pixels per clock cycle and consumes 4117 look-up tables and 4.5 Kbits of block RAMs while its accuracy decreases by 1.2% on the INRIA dataset and by 0.11% on the MIT dataset.

Two-Dimensional (2-D) convolution with different kernel sizes enriches the overall performance in computer vision tasks. Currently, there is a lack of an efficient design method of reconfigurable 2-D convolver, which limits the deployment of Convolution Neural Network (CNN) models at the edge. In this paper, a new approach based on multiplication management and triangular numbers decomposition is proposed. The proposed 2-D convolver includes a certain number of Processing Elements (PE) and corresponding control units, where the former is responsible for computing tasks and the latter manages the combination of multiplication operations to achieve different convolution sizes. Specifically, an odd number list is determined based on the application scenario, which represents the supported sizes of the 2-D convolutional kernel. The corresponding triangular number list is obtained using the triangular numbers decomposition method. Then, the total number of PEs is determined based on the triangular number list and computational requirements. Finally, the corresponding control units and the interconnection of PEs are determined by the addition combinations of triangular numbers. The proposed reconfigurable 2-D convolver is designed by Verilog Hardware Description Language (HDL) and implemented by Vivado 2022.2 software on the XCZU7EG board. Compared with similar methods, the proposed 2-D convolver significantly improves the efficiency of multiplication resources, increasing from 20%similar to 50% to 80%, and achieves a throughput of 1 500 MB/s with 514 logic units, thereby demonstrating its wide applicability.

With the attention paid to privacy protection, human motion recognition (HMR) based on radars has attracted more and more attention. A soft synchronization frequency modulated continuous wave (SS-FMCW) radar has a wider application prospect in HMR by virtue of its signal diversity and structural flexibility. In this article, a new spatiotemporal weighted micro-Doppler (SWMD) spectrum is proposed, which is more competitive for the application of the SS-FMCW radar in HMR. First, to facilitate the understanding of the SWMD spectrum construction method, we introduce the principle behind the SS-FMCW radar based on intermittent ramp signals. Specifically, the SWMD spectrum is constructed by a weighted data fusion algorithm and a time series data fusion algorithm. In addition, we collect data from six different motions from eight testers and demonstrate and analyze the validity of the SWMD spectrum by multiple dimensions. The experimental results show that compared with the conventional time micro-Doppler (MD) spectrum, the accuracy of the SWMD spectrum in HMR is improved by about 7.2%, which is an average of multiple comparison experiments of different classification algorithms with different features.

Depthwise separable convolution (DSC) significantly reduces parameter and floating operations with an acceptable loss of accuracy and has been widely used in various lightweight convolutional neural network (CNN) models. In practical applications, however, DSC accelerators based on graphics processing units (GPUs) cannot fully exploit the performance of DSC and are unsuitable for mobile application scenarios. Moreover, low resource utilization due to idle engines is a common problem in DSC accelerator design. In this paper, a high-performance DSC hardware accelerator based on field-programmable gate arrays (FPGAs) is proposed. A highly reusable and scalable multiplication and accumulation engine is proposed to improve the utilization of computational resources. An efficient convolution algorithm is proposed for depthwise convolution (DWC) and pointwise convolution (PWC), respectively, to reduce the on-chip memory occupancy. Meanwhile, the proposed convolution algorithms achieve partial fusion between PWC and DWC, and improve the off-chip memory access efficiency. To maximise bandwidth utilization and reduce latency when reading feature maps, an address mapping method for off-chip accesses is proposed. The performance of the proposed accelerator is demonstrated by implementing MobileNetV2 on an Intel Arria 10 GX660 FPGA by using Verilog HDL. The experimental results show that the proposed DSC accelerator achieves a performance of 205.1 FPS, 128.8 GFLOPS, and 0.24 GOPS/DSP for input images of size 224×224×3.

Due to high computational requirements, deep-learning decoders for motor imaginary (MI) electroencephalography (EEG) signals are usually implemented on bulky and heavy computing devices that are inconvenient for physical actions. To date, the application of deep-learning techniques in independent portable brain-computer-interface (BCI) devices has not been extensively explored. In this study, we proposed a high-accuracy MI EEG decoder by incorporating spatial-attention mechanism into convolution neural network (CNN), and deployed it on fully integrated single-chip microcontroller unit (MCU). After the CNN model was trained on workstation computer using GigaDB MI datasets (52 subjects), its parameters were then extracted and converted to build deep-learning architecture interpreter on MCU. For comparison, EEG-Inception model was also trained using the same dataset, and was deployed on MCU. The results indicate that our deep-learning model can independently decode imaginary left-/right-hand motions. The mean accuracy of the proposed compact CNN reaches 96.75 ± 2.41

Empowering an intelligent agent with the ability of autonomous navigation in complex and dynamic environments is an important and active research topic in embodied artificial intelligence. In this letter, we address this challenging task from the view of exploiting both the spatial and temporal states of a mobile robot interacting with the crowded environment. Specifically, we propose a Spatial-Temporal State Transformer (ST2) to encode the states while leveraging the deep reinforcement learning method to find the optimal navigation policy accordingly. Technically, the proposed ST2 model consists of a global spatial state encoder and a temporal state encoder, which are built upon the Transformer structure. The spatial state encoder is devised to extract the global spatial features and capture the spatial interaction between pedestrians and the robot. The temporal state encoder is designed to model the temporal correlation among consecutive frames and infer the dynamic relationship of the spatial position transformation. Based on the comprehensive spatial-temporal state representation, the value-based reinforcement learning method is leveraged to obtain the optimal navigation policy. Extensive experiments demonstrate the superiority of the proposed ST2 over representative state-of-the-art methods. The source code will be made publicly available.

The differential count of white blood cells (WBCs) can effectively provide disease information for patients. Existing stained microscopic WBC classification usually requires complex sample-preparation steps, and is easily affected by external conditions such as illumination. In contrast, the inconspicuous nuclei of stain-free WBCs also bring great challenges to WBC classification. As such, image enhancement, as one of the preprocessing methods of image classification, is essential in improving the image qualities of stain-free WBCs. However, traditional or existing convolutional neural network (CNN)-based image enhancement techniques are typically designed as standalone modules aimed at improving the perceptual quality of humans, without considering their impact on advanced computer vision tasks of classification. Therefore, this work proposes a novel model, UR-Net, which consists of an image enhancement network framed by ResUNet with an attention mechanism and a ResNet classification network. The enhancement model is integrated into the classification model for joint training to improve the classification performance for stain-free WBCs. The experimental results demonstrate that compared to the models without image enhancement and previous enhancement and classification models, our proposed model achieved a best classification performance of 83.34% on our stain-free WBC dataset.

The differential count of white blood cells (WBCs) can effectively provide the disease information for patients. Existing stained microscopic WBC classification usually requires complex sample-preparation steps. In contrast, the nuclei of stain-free WBCs are inconspicuous, which also brings great challenges to the classification of WBCs. Besides, as an instrument for acquiring images, microscopes face the issue of being affected by external conditions such as illumination. As such, image enhancement, as one of the preprocessing methods of image classification, is essential in improving the image qualities of stain-free WBCs. However, traditional and existing convolutional neural network (CNN)-based image enhancement are mostly designed to improve the perceptual quality to humans, which would not be effective in automatic stain-free classification of WBCs.

为实现5G高带宽信号的快速测试和复杂通信算法的快速验证,提出了一种基于MPSoC的Sub-6 GHz频段软件无线电(SDR)测试实验平台.平台采用Xilinx ZYNQ UltraScale+MPSoC和射频收发器ADRV9009搭建,两者通过JESD204 B高速串行接口进行数据流传输.采用软硬件协同设计思想,具备高可重构性和移植性,其中,硬件/PL逻辑部分负责射频信号到基带信号的转换与信号处理;软件部分依托Petalinux和Libiio的加持,可对测试系统进行全局控制.此外,该系统还拥有超宽调谐范围、可配置MIMO等优势,可作为5 G SDR实验平台使用.经高带宽信号收发实验验证,该测试系统满足5 G Sub-6 GHz信号收发链路要求,信道可靠性较高,在5G信号测试和算法原型验证方面,具有一定的应用价值.

The proposal of the ubiquitous power Internet of Things (UPIoT) has increased the demand for communication coverage and data collection of smart grid; the quantity and quality of communication networks are facing greater challenges. This brief applies (73, 37, 13) quadratic residue (QR) codes to power line carrier technology to improve the quality of local data communication in UPIoT. In order to improve the decoding performance of the QR codes, an induction method for the error pattern is proposed, which can divide the originally coupled error pattern into six parts and reuse the same module for decoding. This method greatly reduces the resource requirements, so that (73, 37, 13) QR code can be implemented on FPGA hardware. Notably, the hardware architecture is a modular framework, which can fit into an FPGA with different sizes. As an example (73, 37, 13), QR code is implemented on Intel Arria10 FPGA; the experimental result shows that the maximum decoding frequency of this architecture is 21.7 M Hz, which achieves 4121x speedup compared to CPU. Moreover, the proposed architecture benefits from high flexibility, such as modular design and decoding framework in the form of the pipeline which can be seen as an alternative scheme for decoding long-length QR codes.

With the rapid development of FPGA image algorithm, the verification of FPGA image algorithm is more and more important. This paper presents a fast verification platform for shape selection. Different from other methods, the verification platform can generate testbench files quickly and verify simulation results intuitively. In this paper, through the verification of FPGA shape selection algorithm in grain classification, it proves its superiority. The result shows that the verification platform can effectively verify the defects and shorten the development time of FPGA shape selection algorithm. Therefore, the verification platform can be used as a powerful tool to optimize and upgrade the FPGA shape selection algorithm.

This paper presents the design of a laser measurement system for measuring the 3-dimensional(3D) displacement of railway track. The system consists of a three-channel laser sensor and a regular tetrahedral target. With three lasers, the sensor placed at a stationary position away from the railway track gets the 3-dimensional displacement of a target on the railway track. The structural displacement is computed in real time through processing the measured data. A clever conversion formula developed in this paper enables measurement of 3D displacement by tracking three sets of one-dimensional data of a target without vision technology. The efficacy of the laser system in 3D displacement measurement of the railway track was demonstrated through a fine-tuning table test. The maximum error is 1mm, which nearly equals to the accuracy of the laser sensor. An artificial means of marking the target is also proposed to further improve the adaptability of the system to the dark environment.

为提高电磁循迹式越野智能车的控制性能,研究电磁循迹式赛道检测方法,探讨车速与舵机指令的协调控制问题,建模分析不同路况阻力对车速系统的影响,据此对舵机采用模糊PD控制算法及对车速系统采用无扰动切换的Bang-Bang/PID控制算法,并从动平衡与执行机构灵活性的角度提出机械结构的改进方案.设计的小车稳定运行速度达2.92m/s,兼具稳、准、快的优点.实验结果表明:文章所述方法对电磁循迹式越野智能车控制具有很好的适应性.

Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising candidate for the next generation non-volatile memory technologies. However, due to the process variation and the thermal fluctuation, the reliability will be severely affected by the unknown offset of the channel. In this paper, we propose an FPGA architecture of neural network-based dynamic threshold detector for STT-MRAM to tackle the unknown offset. The hardware architecture of neural network (NN) is implemented on Intel FPGA Cyclone V 5CGXFC9D6F27C7 and achieve the similar performance as the software implementation. Then, in order to reduce the resource consumption, we try to decrease the data precision during processing and storage. Finally, we accomplish FPGA-based dynamic threshold detector (DTD) [1] to reduce the time and power cost of NN.