This paper presents a universal self-aligned in situ on-chip micro tensile fracture strength tester designed for tensile strength extraction and process evaluation, which will provide, for the first time as far as the authors know, great force(above 100mN) to in situ on-chip specimen without the introduction of precise instrument, especially suitable for bulk micromachining related tests. The whole structure and process is simple, so it meets the requirements of various process in massive production, the feasibility and universality have been proved by practical evaluation of the several foundries. Its advantages also include self-position, self-measure and self-adaption for loading. In our tests, tensile fracture strength of the etched Si film is between 0.13 to 1.2GPa.
This paper reported a novel high sensitivity and linearity 0-3 kPa piezoresistive pressure sensor by carefully trading off the stress on the beam edge and the deflection of the sensing diaphragm. A shuriken-structured diaphragm (SSD) was proposed for the first time to improve both sensitivity and linearity for the piezoresistive pressure sensor. The fabricated sensor showed a sensitivity of 4.72 mV/kPa/V and a nonlinearity of 0.18% FSO (full scale output) in the pressure range of 0-3 kPa. Compared with our previous work, the sensitivity was increased by 28.3%, while the nonlinearity was reduced by 50%.
This paper reported a novel impact tester which was, for the first time as far as the authors know, able to generate an in situ impact acceleration high than 120000 g to evaluate the shock reliability of microfabricated structures. And the experiment results of the novel tester show a nearly linear relationship with the results obtained from the traditional drop test, which prove it promising for a substitute. Besides, the tester was fabricated with the same process as those widely used for comb-based MEMS sensor, which made it suitable for in situ process quality monitoring and basic structure property evaluation in mass production.
In this paper, a novel current-time model of anodic bonding is proposed and verified experimentally in order to investigate underlying mechanisms of anodic bonding and to achieve real-time monitoring of bonding procedure. The proposed model provides a thorough explanation for the electric current characteristic of anodic bonding. More significantly, it explains two issues which other models cannot explain. One is the sharp rise in current when a voltage is initially applied during anodic bonding. The other is the unexpected large width of depletion layers. In addition, enlargement of the intimately contacted area during anodic bonding can be obtained from the proposed model, which can be utilized to monitor the bonding process. To verify the proposed model, Borofloat33 glass and silicon wafers were adopted in bonding experiments in SUSS SB6 with five different bonding conditions (350 degrees C 1200 V; 370 degrees C 1200 V; 380 degrees C 1200 V; 380 degrees C 1000 V; and 380 degrees C 1400 V). The results indicate that the observed current data highly coincide with the proposed current-time model. For widths of depletion layers, depth profiling using secondary ion mass spectrometry demonstrates that the calculated values by the model are basically consistent with the experimental values as well.
In this study, a one-step method of fabricating nano to micro structures was reported. Monte Carlo (MC) simulation and a fluid equation were employed to study the formation and evolution mechanism. To verify the fundamental simulation and hypothetical mechanism, standard surface technology (STS) was used with a phase delay producer to build the etching system. Also, throughout the practical experiment, the relationship between the structure scale and the process parameter was recorded. Lastly, the reflectance was measured to be only 0.9%, proving that this method was very promising for optical application. (C) 2015 The Japan Society of Applied Physics
To predict the reliability of gold electrode, interdiffusions in Cr/Au, Ti/Au and TiW/Au multi-layers when thermally treated were investigated by depth profiling of auger electron spectroscopy (AES). The primitive measuring results suggest that all the under-layer metals diffuse in gold layer when thermally treated and the rise of temperature enhances these diffusions. Cr and Ti accumulate at the surface of gold layer in Cr/Au and Ti/Au samples. And it seems that the introduction of W prevents these accumulations in TiW/Au sample. The measurement of nanohardness indicates that the interdiffusion of under-layer metals increase the nanohardness, while annealing decreases the nanohardness of metal films.
In this work, reliable electric interconnection for MEMS/NEMS devices was realized by Au/a-Si (amorphous Si) and Au/c-Si (single-crystal Si) eutectic reaction in anodic wafer bonding process. We measured different resistances of different bonding areas under different bonding temperature. When bonding temperature is under 370 °C, the resistance of the different areas (from 200 μm2 to 1000 μm2) fluctuate within a narrow range and more than 80 % of the resistance is less than 10 ohm. Compared with Au/c-Si contact, Au/a-Si contact is more reliable. When bonding temperature is above 370 °C, the resistance is related to the contact area and the discrete nature of the resistance is relatively large. According to statistics, more than 50 % of the resistance is above 100 ohm.
Beam structure is widely used for MEMS (Micro-electromechanical Systems) design, the mechanical properties of beam structure are of great importance to guide the design of MEMS devices. Among the many properties, stress rupture properties are studied in this paper. The sensor based on piezoresistive effect with a specially designed cross-beam structure is proposed for stress rupture properties measurement. Finite element method (FEM) is applied to calculate the stress distribution on the beam based on the sensor output. It is found that the maximum tensile stress for the beam at the fracture moment is far less than silicon yield and fracture strength. Compared with other mechanical testing methods, the proposed method is much easier to be implemented and compatible with MEMS sensor production.
This paper discussed a novel design of the piezoresistive pressure sensor with high sensitivity and high linearity. Partially structured diaphragm with four peninsulas and a center boss was applied to improve the sensor performance for low pressure measurement. Finite element analysis (FEA) was applied to evaluate the sensor design. Simulation results indicated that a sensitivity of 25.3 mV/V full-scale output and a nonlinearity error of 0.11 %FSS in the pressure range 0-5 kPa. Through comparisons with other typical sensors, the proposed sensor design exhibited the best overall performance.
This paper presents a new method for achieving Au/aSi (amorphous Si) eutectic wafer-level bonding. The Si-Glass wafer bonding was conducted with Au layer patterned on glass wafer and amorphous Si layer on silicon wafer. The amorphous Si here was transformed from the single crystal silicon by the Argon implantation process. A novel torsional strength test structure was proposed and applied for characterization of Au/Si bonding strength. The anti-corrosion property of the bonded wafers was evaluated in the KOH thinning process. The performance of the Au/Si bond with respect to the bond area were studied in detail. Results indicated that the Au/a-Si bonding exhibited much better performance compared with the conventional Au/c-Si bonding.
To evaluate the quality of deep-reactive-ion-etching process quantitatively, a novel device was designed and fabricated to obtain the flexural fracture strength of etched surface. The device is composed of beam of uniform strength and on-chip multifunctional micro needle. The testing method only requires probe station in the measurement. Devices designers can utilize the method to research the mechanical reliability of the devices easily, and as for foundry, the testing result can be used as a parameter to reflect the etching capacity. From our bending test, it can be demonstrated that the fracture strength of the etched surface in our etching conditions is about 2.1 GPa.
In this work, compatible CMOS-MEMS process with surface micromachining is investigated. Surface micromachining method for cantilever fabrication has been merged with conventional CMOS process, and release of MEMS structure is conducted after CMOS process. We designed polysilicon MEMS structures as well as CMOS devices and circuits on a monolithic sensor chip for the investigation of the influence of stress induced by non-adequate post-CMOS annealing. The impact of step coverage and the releasing process on both the MEMS and CMOS components are also discussed.
In this paper, an one-step method to fabricate the black silicon with varying scale was introduced. This novel method was conducted at room temperature and completely compatible with the traditional process. This method was based on a standard Bosch deep reactive ions etching with a phase-delay producer. The relationship between the process parameter and the key physical factor was investigated and the practical reflectance of the black silicon was measured. The results showed the black silicon, produced by this method, had a very low reflectance and was easy to change the scale.
A 'black silicon' (BS) surface with low reflectance was fabricated by a standard pulsed deep reactive etching technology at room temperature. Aiming for a better understanding, a systematic experiment was conducted by varying the etching window size and bias power duty cycle. The samples were measured and analysed by a scanning electron microscope, the Bruker Optical Profiler and a UV-3400 spectrometer. It was observed that a broad scale range of the surface structures formed on the surface. With the duty cycle at 0.5, only about 100 nanometre scale replicable silicon cones formed on the surface, but as the duty cycle decreased to 0.25, the height of the silicon forest sharply increased to about 10 mu m, leading to a low reflectance of 0.9% in the visible range for the surface. To clarify the reason for this trend, the bias effective voltage (BEV) was measured and it was confirmed that the BEV would decrease from 100 to 47 V with the duty cycle adjusted from 1 to 0.25. This suggested that this decrease in BEV leads to a reduction of ion energy and ion flux, and then modifies the fabricated structures. Besides, it was found that the broad etching window area only had a maximum promotion of 20% to the scale of the BS, indicating this method was almost free of loading effect.
Two series of devices, bonding quality testing devices and torsional strength testing devices, were designed to fully investigate the mechanical strength of the micro anchor-beam combined structure, which is fabricated by silicon-on-glass process. It's proved that the bonding quality of the anchor degenerates severely when the anchor size becomes very small. And the results of anodic bonding quality testing device demonstrated that array-shaped anchor design helped to improve the anodic bonding yield. According to the bending fracture test of the torsional strength testing devices, the array-shaped anchor design has an almost equal, even bigger torsional strength compared with single anchor.
In this article, the simultaneous fabrication of MEMS and Bi-CMOS components on a monolithic integrated micro-cantilever resonator is investigated. Surface micromachining method for cantilever fabrication has been merged with conventional CMOS process, and release of MEMS structure is conducted after CMOS process. We for the first time propose the additive effects of hydrogen and MEMS steps induced mechanical stress on the IC performance, and at the same time provide a re-adjusting method for integrated process design, in which the NMOS/PMOS threshold voltage is re-adjusted to symmetry by utilizing the MEMS-process-induced IC performance degradation. On-chip digital/analog Bi-CMOS circuits function properly as demonstrated. The proposed re-adjustment process, suitable for fabrications with a variety of design CMOS-MEMS integrated process flexibilities, has the potential to fabricate integrated devices (high quality factor variable capacitors, micromirror arrays and multi-axis gyroscopes etc.).
A reliability test device for measuring the torsional strength of anchors in micro electro-mechanical system (MEMS) devices was designed and fabricated by silicon-on-glass (SOG) process. The device consists of cantilever beam, array-shaped anchor and measuring scale. Torsional fracture tests were carried out on these devices with various anchor sizes. Utilizing the test results, the correlation between torsional strength and side length of anchor was obtained by the finite element analysis (FEA). The fracture morphology also revealed that the bonding strength of array-shaped anchor is much stronger than the ultimate strength of silicon and glass.
The quality and the reliability of the electrical interconnection have a direct impact on the performance of the MEMS/NEMS devices. In this work, reliable electric interconnection for MEMS/NEMS devices was realized by Au/a-Si (amorphous Si) eutectic reaction in the anodic wafer bonding process. In order to evaluate the qualities of the anodic bonded contact, the electrical property of the Au/a-Si contact was characterized by a modified vertical Kelvin method. The resistor network model of the anodic bonded modified Kelvin structure indicates that the relationship between the contact resistance and the measured resistance can be easily established. The contact resistance was precisely measured by minimizing the interferences from parasitic resistances. The test results indicated that the anodic bonded Au/a-Si contact is Ohmic contact and the qualities of small-size bonded contact is greatly improved compared to that of traditional Au/Si contact. In addition, the fabrication process was also simplified by eliminating the high temperature annealing process after ion implantation.
In this work, a monolithic integrated MEMS resonator was fabricated and tested. Surface micromachining method was employed to fabricate the cantilever MEMS resonator after a standard 3 μm CMOS process. The wet release method with dilute HF solution was chosen and compared to the anhydrous HF vapor release process. A release-monitoring structure with polysilicon/Au cantilever array was used to determine the corrosion time of the sacrificial material. Results showed that the MOSFETs function well after proposed release process.