Performance measurement is essential for the users and manufacturers of DSP processors. However, due to the diversity and complexity of DSP architectures and the large overhead of DSP compilers, metrics that effectively and objectively measure and compare the performance of various DSP processors from different manufacturers remain elusive. We introduce in this paper a new concept of instruction group where instructions in an instruction group are executed in parallel. Among other parameters such as the total execution time and the instruction count, we define the instruction group count of a DSP program as a new metric and study the impact of the group count as one of the parameters on various performance aspects of a DSP processor. Extensive experiments have been conducted by compiling the C code of a collection of DSP kernels and application programs and then executing the compiled code on several popular DSP processors. Both static and dynamic experimental data are analyzed and discussed in the context of the architecture of the DSP processors and the efficiency of the compilers.

Performance measurement is essential for the users and manufacturers of DSP processors. However, due to the diversity and complexity of DSP architectures and the large overhead of DSP compilers, metrics that effectively and objectively measure and compare the performance of various DSP processors from different manufacturers remain elusive. We propose a new approach to DSP benchmarking with a new CPU time equation. Using a narrow spectrum benchmarking technique, we design special benchmark programs in C language to evaluate various aspects of DSP architecture such as the number of registers, number of function units, calling convention, the impact of hardware loop control, and load latency. Extensive experiments are conducted on several modern DSP processors including Texas Instruments' TIC62, TIC55 and StarCore's SC series. Both dynamic and static measurements on the benchmark programs are taken and the parameters in the new CPU time equation are used as metrics to analyze and evaluate the performance of various processors. It is noted that our approach does not require hand- optimized assembly code. Also, the experimental results provide some useful information regarding how various aspects of the architectural design of a DSP processor are related to its performance.