A standard test method for lifetime testing in the field of semiconductor devices is the active cycling test, which also finds its application for LEDs. In this work, different boundary conditions of reliability testing, applied at power and duty cycles, are discussed. A workflow for developing a testing procedure, aligned to the device under investigation, is presented. A validated finite volume simulation is used to verify the structure levels of an LED application and to study temperature time evolution by active cycling. The different active cycling parameters can be adjusted in such a way that different failure modes are triggered. The right choice of parameters, hence the optimized testing strategy, will lead to a time reduction of the lifetime testing and improve LED service testing.

Thermophysical properties of materials and the optimization of the heat transfer are becoming more and more important for industrial applications of micro- and nanoelectronic devices. Thin layers in the micrometer to nanometer range are used to give specific functions to the devices. Since the thermophysical properties of thin layers differ from bulk material, this data is required for precise predictions of thermal management. One way to obtain the thermal properties of thin layers is the optical-based Time Domain Thermoreflectance (TDTR) method. To carry out TDTR measurements with a low level of uncertainty, the samples under study must meet requirements related to the surface roughness and a low level of optical scattering. The range of samples analysable by TDTR can be extended by applying the so-called bidirectional heat flow approach. This approach opens the possibility to assess thermal properties of materials with rough surfaces as well. The validity of the implemented model was shown by the characterisation of a test sample with well-known thermal properties fabricated for this purpose out of poly(methyl methacrylate) (PMMA) roughened with acetone:ethanol. The results obtained by TDTR measurements were compared to literature values, demonstrating the applicability of the bidirectional heat flow approach for this setup.

Continued miniaturization of systems, components and materials have raised the need for suitable thermal characterization methods, as heat management is one of the key limiting factors for many electronic applications. Microelectronic devices often consists of nanometre thin films for heat dissipation, whose thermal properties usually deviate from the bulk values and have to be well understood to allow effective heat management. In this work, Scanning Thermal Microscopy (SThM) was employed for quantitative thermal characterization in the sub-100 nm regime. 500 nm tungsten films were characterized at room temperature (300 K) at <; 10 -6 mbar by means of SThM based on the 3ω method. An influence of sample heat treatment on thermal conductivity was observed. The tungsten thin films were additionally characterized with Time Domain Thermoreflectance, showing comparably results.

Two valuable tools for the thermal characterization of thin films are Time Domain Thermoreflectance (TDTR) and Scanning Thermal Microscopy (SThM). TDTR is capable of delivering temperature dependent thermal properties by comparing measured TDTR data to different models of heat transport. In this work different models are applied on a 500 nm thin, CVD grown W-layer on TiN coated Si. SThM is a complementary technique where the thermal conductivity (λ) gets directly measured in a quantitative way using the 3ω method. TDTR and SThM show that room temperature W-samples are altered by heat treatment under argon atmosphere: On the as deposited W-layer, λ is about 154 W/mK. After a short heat treatment (2.5 minutes at 425°C), λ decreases to about 147 W/mK, while along heat treatment (4 cycles of ~18 minutes at 425°C) increases λ to ~155 W/mK.

This paper presents the experimentally as well as theoretically investigated thermal conductivities and thermal boundary resistances of the constituting materials of a GaN high-electron-mobility transistor. Measurements were carried out in the temperature range of 300 K to 773 K using a thermoreflectance measurement setup. The measurement showed that the thermal conductivities of the AlN and GaN were a magnitude higher than the thermal conductivity of the alloys Al0.32Ga0.68N and Al0.17Ga0.83N. It was shown that the thermal boundary resistance across the Pt/AlN and Pt/GaN interfaces decreased with temperature until reaching the Debye temperature of both adjacent materials. No temperature dependence was found for the thermal boundary resistance across the Pt/Al0.32Ga0.68N, Al0.32Ga0.68N/AlN. and GaN/Al0.32Ga0.68N. The application of the Callaway model provided values for the phonon scattering of AlN, GaN, Al0.32Ga0.68N and Al0.17Ga0.83N, which elucidated the scattering mechanisms of the phonons. Feeding that into the Hua-Minnich model for through plane thermal conductivity showed that size effects from ballistic phonon transport were noticeable for the 1065 nm thick GaN layer and dominant for the 167 nm thick AlN layer, the 423 nm thick Al0.17Ga0.83N,and the 65 nm thick Al0.17Ga0.83N at 300K.

Time Domain Thermoreflectance (TDTR) and Scanning Thermal Microscopy (SThM) are valuable tools for thermal characterization of thin films. In this work, TDTR-SThM compatibility is demonstrated by quantitative measurements of the thermal conductivity (lambda) on a 500 nm thin, CVD grown W-layer. The picosecond laserflash equipment TDTR assesses lambda through thermal diffusivity normal to the surface. SThM directly measures lambda on the sample surface quantitatively by the 3 omega method. TDTR-SThM both show that room temperature lambda is altered by heat treatment: On the as deposited W-layer, lambda is about 153 W/mK. After a short heat treatment (2.5 min at 425 degrees C), lambda decreases to about 147 W/mK, while a long heat treatment (4 cycles of similar to 20 min at 425 degrees C) increases lambda to similar to 155 W/mK. This change in lambda is attributed to a grain size change, shown by theoretical calculations considering grain boundary scattering.

Integration of metal oxide nanowires in metal oxide gas sensors enables a new generation of gas sensor devices, with increased sensitivity and selectivity. For reproducible and stable performance of next generation sensors, the electric properties of integrated nanowires have to be well understood, since the detection principle of metal oxide gas sensors is based on the change in electrical conductivity during gas exposure. We study two different types of nanowires that show promising properties for gas sensor applications with a Scanning Probe Microscope—Scanning Electron Microscope combination. Electron Beam Induced Current and Kelvin Probe Force Microscopy measurements with a lateral resolution in the nanometer regime are performed. Our work offers new insights into the dependence of the nanowire work function on its composition and size, and into the local interaction between electron beam and semiconductor nanowires.

A challenge for the power electronics industry is the reliability of solder joints [1] for automotive application due to the increasing performance requirements, especially in handling thermal and electrical environments. A known fact is that the presence of voids in the solder joints adversely affects thermal resistance due to decreased heat dissipation and a reduction of the cross-sectional area, which can lead to reliability effects [2]. In this work, the influence of different voids scenarios in solder joints via finite volume simulation on the example of a commercially available MOSFET was studied. Finite volume simulations (FloTHERM (R)) provide thermal transients that can be transferred into their corresponding structure function [3], [4]. Thus, changes in the heat path and the corresponding thermal resistance can be evaluated and interpreted. This work shows that voids implemented as random distributed, internal voids inside the solder joint can be correlated to the common approach of effective thermal conductivity [5].