Designers use Monte Carlo simulations to evaluate the impact of variability on circuits, but such simulations require prohibitive amounts of computation to characterize rare events. In this paper, we propose a method by which the long tail behavior of circuits can be modeled with a reasonable number of simulations. This technique is then applied to the problem of domino keeper sizing to determine the sizing necessary to ensure a reliable circuit. We find that to ensure reliability for a commercial 45 nm process, the width of the keeper must be 0.17 times the effective width of the pull-down stack. Such a wide keeper results in a delay penalty of 9.9% compared to a circuit with no keeper.

The most energy-efficient operating point for CMOS circuits is near the threshold voltage. Conventional models are difficult to use in this region because they are piecewise and/or discontinuous around threshold. This paper proposes a simple new model for I on that is valid in the near-threshold region. Based on the ON-current, a propagation delay model is derived. The model is applied to determine the minimum energy point for inverter chains. The transregional model matches simulated data within 15 mV, while the conventional exponential subthreshold model underestimates the supply voltage by up to 80 mV.