Experiments on ASDEX Upgrade (AUG) in 2021 and 2022 have addressed a number of critical issues for ITER and EU DEMO. A major objective of the AUG programme is to shed light on the underlying physics of confinement, stability, and plasma exhaust in order to allow reliable extrapolation of results obtained on present day machines to these reactor-grade devices. Concerning pedestal physics, the mitigation of edge localised modes (ELMs) using resonant magnetic perturbations (RMPs) was found to be consistent with a reduction of the linear peeling-ballooning stability threshold due to the helical deformation of the plasma. Conversely, ELM suppression by RMPs is ascribed to an increased pedestal transport that keeps the plasma away from this boundary. Candidates for this increased transport are locally enhanced turbulence and a locked magnetic island in the pedestal. The enhanced D-alpha (EDA) and quasi-continuous exhaust (QCE) regimes have been established as promising ELM-free scenarios. Here, the pressure gradient at the foot of the H-mode pedestal is reduced by a quasi-coherent mode, consistent with violation of the high-n ballooning mode stability limit there. This is suggestive that the EDA and QCE regimes have a common underlying physics origin. In the area of transport physics, full radius models for both L- and H-modes have been developed. These models predict energy confinement in AUG better than the commonly used global scaling laws, representing a large step towards the goal of predictive capability. A new momentum transport analysis framework has been developed that provides access to the intrinsic torque in the plasma core. In the field of exhaust, the X-Point Radiator (XPR), a cold and dense plasma region on closed flux surfaces close to the X-point, was described by an analytical model that provides an understanding of its formation as well as its stability, i.e., the conditions under which it transitions into a deleterious MARFE with the potential to result in a disruptive termination. With the XPR close to the divertor target, a new detached divertor concept, the compact radiative divertor, was developed. Here, the exhaust power is radiated before reaching the target, allowing close proximity of the X-point to the target. No limitations by the shallow field line angle due to the large flux expansion were observed, and sufficient compression of neutral density was demonstrated. With respect to the pumping of non-recycling impurities, the divertor enrichment was found to mainly depend on the ionisation energy of the impurity under consideration. In the area of MHD physics, analysis of the hot plasma core motion in sawtooth crashes showed good agreement with nonlinear 2-fluid simulations. This indicates that the fast reconnection observed in these events is adequately described including the pressure gradient and the electron inertia in the parallel Ohm’s law. Concerning disruption physics, a shattered pellet injection system was installed in collaboration with the ITER International Organisation. Thanks to the ability to vary the shard size distribution independently of the injection velocity, as well as its impurity admixture, it was possible to tailor the current quench rate, which is an important requirement for future large devices such as ITER. Progress was also made modelling the force reduction of VDEs induced by massive gas injection on AUG. The H-mode density limit was characterised in terms of safe operational space with a newly developed active feedback control method that allowed the stability boundary to be probed several times within a single discharge without inducing a disruptive termination. Regarding integrated operation scenarios, the role of density peaking in the confinement of the ITER baseline scenario (high plasma current) was clarified. The usual energy confinement scaling ITER98( p,y ) does not capture this effect, but the more recent H20 scaling does, highlighting again the importance of developing adequate physics based models. Advanced tokamak scenarios, aiming at large non-inductive current fraction due to non-standard profiles of the safety factor in combination with high normalised plasma pressure were studied with a focus on their access conditions. A method to guide the approach of the targeted safety factor profiles was developed, and the conditions for achieving good confinement were clarified. Based on this, two types of advanced scenarios (‘hybrid’ and ‘elevated’ q -profile) were established on AUG and characterised concerning their plasma performance.

The micro telecommunications computing architecture (MTCA) standard is widely used in developing advanced data acquisition and processing solutions in the big physics community. The number of applications implemented using commercial advanced mezzanine cards (AMC) using AMD-Xilinx and Intel field-programmable gate array (FPGA) systems on chip is growing due to the flexibility and scalability of these reconfigurable hardware devices and their suitability to implement intelligent applications using artificial intelligence and machine learning techniques. This article presents the specific design methodologies for hardware acceleration proposed by both FPGA manufacturers. Comparative results are obtained from two different software/hardware setups using two different AMCs, one based on Intel FPGA Arria 10 and another based on Xilinx ZynqMP. This article illustrates the process of how to modify the board support package, required by the hardware acceleration methodology, to implement the JESD204B and low-voltage differential signaling (LVDS) interfaces with the FPGA mezzanine card (FMC) modules containing the ADCs, to prepare the AMC cards to implement such kind of applications. The data acquisition and processing implementation inside these reference designs, with both languages OpenCL and high-level synthesis (HLS), is described. An important feature, needed for many applications in the big physics field, is the interface with the Experimental Physics and Industrial Control System (EPICS) software framework using the ITER Nominal Device Support (NDS) framework, which is briefly described.

Image-based diagnostics are key for fusion experiments. The operating conditions at ITER and the future machines require changing the role of such systems from monitoring and archiving for offline postprocessing to real-time processing. One of the roles of such systems is machine protection. A relevant application of vision diagnostics is the wall and divertor temperature monitoring and hot spot detection. However, algorithms for hot spot detection are computationally costly. To achieve real-time performance at the required time resolution for all these experiments, evaluating and validating the newest technologies is vital. This work applies heterogeneous computing techniques based on the OpenCL standard to the real-time hot spot detection problem and obtains the performance values in a Micro Telecommunications Computer Architecture (MTCA) platform. OpenCL reduces the development time, improves portability, and simplifies the evaluation and validation of each part of the algorithm to find the best-suited device in the heterogeneous system. The proposed solution enables balancing the computational load between a field-programmable gate array (FPGA) and a graphical processing unit (GPU). The algorithm has been adapted and optimized, taking profit on the particularities of each platform.

These days, research on the classification of neutron/gamma waveforms in scintillators using pulse shape discrimination (PSD) techniques is a highly studied topic. Numerous methods have been explored to optimize this classification, with some of the most recent research being focused on machine learning techniques with excellent results. These approaches are mainly based on the use of 1-D convolutional neural networks (CNNs). In this field, field-programmable gate arrays (FPGAs) with high-sampling rate analog to digital converters (ADCs) have been used to perform this classification in real-time. In this work, we select a potential architecture and implement it with the help of the IntelFPGA OpenCL SDK environment. A shorter and C-like development of OpenCL enables a more straightforward modification and optimization of the network architecture. The main goal of this work is the evaluation of the needed resources and the obtained performance to prototype a complete solution in the FPGA. The FPGA design is generated as if it was connected to an ADC module streaming the data samples with the help of a Board Support Package developed for an IntelFPGA ARRIA10 available in an Advanced Mezzanine Card (AMC) module in an Micro Telecommunications Computing Architecture (MTCA.4) platform. The prototyped solution has been integrated into Experimental Physics and Industrial Control System (EPICS) using the nominal device support (NDS) model currently being developed by ITER.

Many of the signals that are relevant to fusion science come from 1D signals or time-series. In this field, the resulting Neural Networks are much simpler than the more mainstream vision-based neural networks. A significant reduction in both dimension and complexity make them suitable to be synthesized in FPGAs. We have developed new features for the IRIO-OpenCL platform to support this technology for fusion problems. The work presented analyzes the feasibility of such diagnostics use cases and how they can be integrated with the help of OpenCL technology. The development and testing platform consists of an MTCA.4 system with an AMC module integrating an Intel Arria 10 FPGA. An ADC connected using the FMC interface samples the analog signals passed to the OpenCL processing kernels. By using OpenCL, the FPGA kernels communicate with the host machine in a standardized way. This brings two main advantages. First, this is an ideal prototyping framework. Second, once a solution is final, the FPGA kernels are integrated into the control system (EPICS) using the IRIO-OpenCL layer, which has been developed with Nominal Device Support (NDSv3). Finally, we present the results of the optimizations to the kernels of an application example based on a neutron/gamma discrimination Neural Network, which achieves up to a classification rate of 1.3 MEvents/s.

The development of high-performance data acquisition (DAQ) and processing systems is crucial for the next-generation diagnostics used in big science experiments. In the ITER experiment, the instrumentation, control hardware, and software architecture selected for this type of application is called a fast controller. The core element of a fast controller is a chassis based on the use of the PCIe eXtension for Instrumentation (PXIe) or Micro Telecommunication Computing Architecture (MTCA). This paper presents a software framework named IRIO-OpenCL that was developed using the ITER CODAC Core System (CCS) Linux-based distribution, oriented toward the development of field-programmable gate array (FPGA)-based DAQ systems using OpenCL. State-of-the-art DAQ-FPGA systems are developed using hardware description languages (HDLs). The approach used in IRIO-OpenCL simplifies DAQ to enable the user to write C-like processing algorithms with OpenCL, minimizing the use of HDLs. The software has been implemented in C++ following ITER’s Nominal Device Support v3 (NDSv3) model that abstracts and generalizes the development of software device drivers and simplifies the interface with the Experimental Physics and Industrial Control System (EPICS). The framework has been validated in an ITER fast controller including an MTCA.4 chassis with an advanced mezzanine card (AMC) module using an Arria 10 FPGA from Intel FPGA and an FPGA mezzanine card (FMC) DAQ module from Analog Devices. The developed application solves the DAQ and processing problems associated with the neutron flux measurement and achieves a sampling rate of 1 GS/s using approximately 40 % of the FPGA resources. The methodology proposed in this paper reduces the development time of these systems while maintaining high performance.

The Linear IFMIF (International Fusion Materials Irradiation Facility) Prototype Accelerator (LIPAc) injector consists of a 140 mA proton/deuteron source, its associated low energy beam transport line (LEBT) as well as ancillaries such as water cooling skid, vacuum groups, High Voltage Power Supplies (HVPS), etc. A specific element, the beam "Chopper", was included in the LEBT to generate short ((similar to)100 mu s) and sharp-edged beam pulses ((similar to)10 mu s) and allow the use of interceptive diagnostics in the high energy part of the LIPAc during commissioning phases of the Radio Frequency Quadrupole RFQ (5 MeV) and the Superconducting Radio Frequency SRF Linac (9 MeV). The chopper was designed to operate in pulsed mode with very sharp rise and fall times, meaning the chopper will be used to "cut" the long rise time of the source as well as the fall time of the beam pulse. The chopper thermal screen has not been designed to withstand very high beam power (i.e., beam length and duty cycle need to be monitored); in addition, the chopper HVPS needs to be monitored in real time to detect a possible trip and extract the beam before downstream devices are damaged. For these applications, standard PLC based interlocks are too slow; therefore, faster solutions are envisaged. The proposed solution for the required interlock system is based on COTS technology with XILINX FPGAs using RIO (Reconfigurable Input/Output) technology from National Instruments (CompactRIO platform). The paper discusses the implementation of the interlock system, the response times of the proposed architecture and the fitness of the technology. Additionally, the system can be integrated into the IFMIF control system using EPICS as a standalone solution.

Interlocks are the instrumented functions of ITER that protect the machine against failures of the plant system components or incorrect machine operation. Regarding I&C, the Interlock Control System ensures that no failure of the conventional ITER controls can lead to severe damage of the machine integrity or availability. ITER Interlock System incorporates several Plant Systems that require response times below 1 ms to perform the required protection actions. Systems like the Coil Power Supply System (CPSS), Ion Cyclotron Heating and Current Drive (ICH&CD), Neutral Beam Injectors and Current Drive (NBI&CD), Disruption Mitigation System (DMS), and others. ITER developed a methodology to create the fast architecture for the Plant Interlock Systems (PIS) that ensures high integrity on the final solution. The functional safety standard IEC 61508 has been used to define a methodology for the configuration of the RIO (Reconfigurable Input/Output) platform from National Instruments (compactRIO platform). This work describes in detail this methodology, valid for most cases just selecting different input/output signal types to be handled and choosing different numbers of interlock functions to be performed. In addition, this paper describes the development of the interlock system for the ITER Poloidal Field and Central Solenoid Coil's Power Converter protection, a special case due to its unique configuration, the most complex implemented up to date. The development of this special case "puts to a test" the methodology's approach. Finally, the discussion of the fitness of the methodology and the performance of the system is presented.