THE SYNERGISTIC PROCESSOR ELEMENT IS A NEW ARCHITECTURE ORIENTED FOR MULTIMEDIA AND STREAMING PROCESSING. IN THIS ARCHITECTURE, THE MEMORY IS NOT A CACHE BUT A PRIVATE OR SCRATCH PAD MEMORY. SUCH A MEMORY IS SIMPLE AND NEEDS TO BE HIGH-FREQUENCY AND LARGE SPACE IN LOW-POWER. THIS DESIGN USES AN 11 FAN-OUT OF FOUR (11 F04), Six-CYCLE, FULLY PIPELINED, EMBEDDED 256-KBYTE SRAM FOR THIS PURPOSE. THE DESIGN'S MEMORY IS NOT ONE HARD MACRO, BUT A GROUP OF CUSTOM MACROS PHYSICALLY DISTRIBUTED TO OPTIMIZE THE PIPELINE.