This chapter presents an architecture of the system for fast text search and documents comparison with main focus on N-gram-based algorithm and its parallel implementation. The algorithm which is one of several computational procedures implemented in the system is used to generate a fingerprint of analyzed documents as a set of hashes which represent the file. This work examines the performance of the system, both in terms of a file comparison quality and a fingerprint generation. Several tests were conducted of N-gram-based algorithm for Intel Xeon E5645, 2.40 GHz which show approximately 8x speedup of multi over single core implementation.
The primary intention of this paper is to present the results of several cases where the FPGA technology was used for high performance calculations. We gathered applications that had been developed over the last couple of years. Over this period of time we observed that there had been a rapid growth of interest in the utilization of FPGA for HPC. Basing on our expertise we give selected metrics, results and conclusions which, in our opinion, are important for anyone who is interested in FPGA as an alternative for faster computations. A brief description of the characteristics of FPGA and FPGA usage for acceleration are also included for novices on the subject.
In this paper a novel method of computation using FPGA technology is presented. In several cases this method provides a calculations speedup with respect to the General Purpose Processors (GPP). The main concept of this approach is based on such a design of computing hardware architecture to fit algorithm dataflow and best utilize well known computing techniques as pipelining and parallelism. Configurable hardware is used as a implementation platform for custom designed hardware. Paper will present implementation results of algorithms those are used in such areas as cryptography, data analysis and scientific computation. The other promising areas of new technology utilization will also be mentioned, bioinformatics for instance. Mentioned algorithms were designed, tested and implemented on SGI RASC platform. RASC module is a part of Cyfronet's SGI Altix 4700 SMP system. We will also present RASC modern architecture. In principle it consists of FPGA chips and very fast, 128-bit wide local memory. Design tools avaliable for designers will also be presented.
Kazimierz Wiatr合作论文数information technology and electronics Department4