OPC UA PubSub is a recent addition to the OPC UA industry standard used for machine-type communication in the Industrial Internet of Things. It can be combined with Time Sensitive Networking (TSN) to offer deterministic latency and bounded jitter. In this work, we model the network interactions between Credit-Based Shaper (CBS) and PubSub using Network Calculus. We derive worst-case delay bounds for various numbers of hops, payload sizes, and competing flows. The derived bounds are confirmed using deployments on commercial-of-the-shelf hardware and open-source solutions relying on a low-latency Linux kernel. Based on the results, we observe that the derived bounds are satisfied in all scenarios of seven hops with a round-trip-time (RTT) varying between 1 to 2.5 ms for respective payload sizes of 59 to 1481 B. Similarly, for jitter we observe fluctuations of +/- 250 mu s. Complementing the CBS results, we evaluate time-aware shaping, where we observe lower RTTs for average payload sizes of around 800 mu s. Our contributions show that OPC UA PubSub applications can co-exist with TSN.

Network modeling often relies on simulation tools due to their flexibility and cost-effectiveness. However, in many cases, those tools can only cover some aspects of real-world networks accurately. Measurements on hardware testbeds are more accurate but require more resources and configuration and are thus frequently impractical for real-world networks. Graph Neural Networks (GNNs) are a promising machine learning approach proven to be especially useful for learning the properties of computer networks. In this paper, we present a GNN-based approach that uses simulation data as an additional input to predict latency values measured on real hardware. We train our model with an existing dataset from a hardware testbed and show that it can predict the latency distribution in unseen topologies with a MAPE of 27.2 % and an MdAPE of 19.8 %.

Packet processing in current network scenarios faces complex challenges due to the increasing prevalence of requirements such as low latency, high reliability, and resource sharing. Virtualization is a potential solution to mitigate these challenges by enabling resource sharing and on-demand provisioning; however, ensuring high reliability and ultra-low latency remains a key challenge. Since bare-metal systems are often impractical because of high cost and space usage, and the overhead of virtual machines (VMs) is substantial, we evaluate the utilization of containers as a potential lightweight solution for low-latency packet processing. Herein, we discuss the benefits and drawbacks and encourage container environments in low-latency packet processing when the degree of isolation of customer data is adequate and bare metal systems are unaffordable. Our results demonstrate that containers exhibit similar latency performance with more predictable tail-latency behavior than bare metal packet processing. Moreover, deciding which mainboard architecture to use, especially the cache division, is equally vital as containers are prone to higher latencies on more shared caches between cores especially when other optimizations cannot be used. We show that this has a higher impact on latencies within containers than on bare metal or VMs, resulting in the selection of hardware architectures following optimizations as a critical challenge. Furthermore, the results reveal that the virtualization overhead does not impact tail latencies.

Real-world Wide Area Network (WAN) topologies are scarce. The shift towards machine learning in network management and optimization brings a need for large datasets, including real-world topologies. WAN topologies can be generated using graph generative models. Graph generative models can be divided into parameterized and data-driven approaches. Data-driven approaches can be further divided into permutation-invariant and permutation-variant. In this paper, we improve on existing work, which utilized adjacency-matrix-based, permutation-variant Generative Adversarial Networks to synthesize WAN topologies. We achieve this by using existing, data-driven approaches that are permutation-invariant w.r.t. their input. Our results show a decrease in the mean Kolmogorov-Smirnov distance over various graph theoretical metrics of 80 %. Furthermore, we employ graph upscaling models to increase WAN topology sizes while preserving their properties up to a scaling factor of 256. We publish all datasets and hope they can be of help in training machine learning models, such as communication network performance prediction models or digital twins, enabling better automated network management.

Real-time systems rely on deterministic, reliable, and low-latency networks. Ethernet with Time Sensitive Networking (TSN) is used to enhance these systems' robustness while fulfilling their increasing requirements. Instead of introducing a single solution offering low latency, jitter, and packet loss, TSN provides a set of mechanisms that can be selectively combined for each specific use case. Having the means to assess various TSN standards and their configuration is crucial for successful deployments, with hardware (HW) infrastructure and simulators being common approaches. Each method presents challenges, which we aim to tackle with this work by unifying the experiment configuration and its deployment in respective environments. As a base, we use an open-source TSN framework called EnGINE. We extend the framework's functionality and provide a replacement for its HW deployment using the OMNeT++ simulator. A simulated environment is integrated via a translation layer that converts an EnGINE configuration into an OMNeT++ one. We provide design and implementation details and verify the functionality of our approach by running initial experiments and comparing them to previous results by the EnGINE authors. We show that simulation generally achieves lower delay and jitter due to its idealistic nature without typical system artifacts. However, some HW infrastructure and software-dependent configurations may unintentionally impact simulation results. Furthermore, we open-source our contributions enabling an easy way to configure once but evaluate twice while providing additional insights into HW and simulator deployments.

Network digital twins commonly rely on Graph Neural Networks (GNNs) as functional models. They typically predict network performance metrics, such as latencies. Most approaches have one of the following restrictions: they use simulated data, predict mean values, or don't utilize formal method results as inputs. We introduce an approach that: (I) relies on data obtained from a hardware testbed, increasing realism, (II) predicts quantiles in addition to means, increasing flexibility and applicability, (III) uses the formal method of network calculus to obtain input features, increasing prediction accuracy. We show that latencies in hardware testbeds can be predicted at different quantiles with median relative errors between 8% and 29% using a simple GNN architecture. Furthermore, we show that network calculus bounds are especially useful for predicting higher quantiles and that they mostly correct large prediction errors.

Network planning and control require precise, reliable, and dynamic digital network models to easily obtain performance metrics. One central performance metric in any network is the end-to-end latency of connections which can be inferred from queue utilizations along its path. Models take a variety of forms: simulation, emulation, stochastic and deterministic formal methods, and machine-learning-based or -assisted approaches. Simulation and emulation require either too much computational time or too many hardware resources, while formal methods often have a high computational complexity leading to poor scalability. Machine-learning-based methods scale better to larger problem spaces, however, current approaches mainly concentrate on mean performance metric predictions. We show that such an approach can be extended to predict queue utilization and end-to-end latency behavior over time in dynamic networks. This is achieved by utilizing Temporal Graph Neural Networks (T-GNNs) which can model spatio-temporal dependencies. The approach achieves a mean queue utilization error of 5.5% and a flow-level end-to-end latency MARE of 5%-55% depending on time resolution over 100 random topologies. We show that this approach outperforms a non-temporal, static Graph Neural Network (GNN) on the same task in terms of capturing dynamic network behavior such as queue build-up and draining. The approach performs similar to related work while increasing flow rates by up to three orders of magnitude—this improvement is bought with a trade-off in supported scheduling mechanisms and traffic patterns. Our results show that such a T-GNN approach can be useful for performance modeling of high data rate flows in dynamic networks.

Machine learning models for tasks in communication networks often require large datasets to be trained. This training is cost intensive, and solutions to reduce these costs are required. It is not clear what the best approach to solve this problem is. Here we show an approach that is able to create a minimally-sized training dataset while maintaining high predictive power of the model. We apply our approach to a state-of-the-art graph neural network model for performance prediction in communication networks. Our approach is limited to a dataset of 100 samples with reduced sizes and achieves an MAPE of 9.79% on a test dataset containing significantly larger problem sizes, compared to a baseline approach which achieved an MAPE of 37.82%. We think this approach can be useful to create high-quality datasets of communication networks and decrease the time needed to train graph neural network models on performance prediction tasks.

Packet processing in current network scenarios faces complex challenges due to the increasing prevalence of requirements such as low latency, high reliability, and resource sharing. Virtualization is a potential solution to mitigate these challenges by enabling resource sharing and on-demand provisioning; however, ensuring high reliability and ultra-low latency remains a key challenge. Since bare-metal systems are often impractical because of high cost and space usage, and virtual machines require substantial additional resources, we evaluate the utilization of containers as a potential lightweight solution for low-latency-enabled packet processing. Herein, we discuss the benefits and drawbacks and encourage the use of container environments in low-latency packet processing when the degree of isolation of customer data is adequate and bare metal systems are unaffordable. Our results demonstrate that containers achieve similar latency performance with more predictable tail-latency behavior compared to bare metal packet processing. Further-more, we show that the overhead caused by virtualization is negligible in tail latencies.

TCP throughput and RTT prediction are essential to model TCP behavior and optimize network configurations. Flows adapt their sending rate to network parameters like link capacity or buffer size and interact with parallel flows. Especially the elastic behavior of TCP congestion control can vary, even when only slight changes in the network occur. Thus, existing analytical models for TCP behavior reach their limits due to the number and complexity of different algorithms. Machine learning approaches, in contrast, are often fixed to specific network topologies. This paper presents a TCP bandwidth and RTT prediction approach that can handle different algorithms and topologies. For this, we utilize Gated Graph Neural Networks and simulated network traffic. We evaluate different encodings of the input data into graphs and how network size, number of flows, and TCP algorithms influence prediction accuracy. Additionally, we quantify the impact of different input features on our models. We show that Graph Neural Networks can be used to model TCP behavior. The resulting models can predict RTT with a median relative error of 2.29% and throughput with an error of 13.31%.

The Precision Time Protocol (PTP) synchronizes clocks in a network with high precision. The protocol finds use in many areas, such as smart manufacturing, intra-vehicular networks, and critical infrastructure. It becomes clear that striving for security is an important goal. If an attacker succeeds in disturbing the network synchronization, the impact can result in a cascading set of failures. Unfortunately, neither the previous two IEEE standards for PTP, nor the popular implementation linuxptp, feature or implement sufficient security options.This work focuses on implementing the security extensions for PTP based on the latest PTP standard IEEE 1588-2019 to minimize the threat of attacks and their possible impact. We provide a detailed analysis on PTP synchronicity and security. Based on that, we design and implement software-only tooling to quantify the PTP performance using commercial off-the-shelf hardware and open-source solutions on a linear topology with four to nine hops.The measurements compare the End-to-End (E2E) and Peer-to-Peer (P2P) delay calculation modes and the usage of Transparent Clocks (TC) in parts of the network. Both E2E and P2P show visible degradation of clock synchronization with each hop and standard deviations of 118.6 to 571 ns. The TCs perform better, demonstrating a standard deviation between 90 to 140 ns on four to nine hops. We evaluate different logSyncInterval values corresponding to different PTP profiles and do not observe a major impact on the clock behavior caused by the extensions. The measurement precision of the system is within ±40 ns.Our evaluation of the newly implemented security extensions to linuxptp shows that the security extensions do not have a significant impact on the clock synchronization and our approach is a feasible addition to PTP. Besides, our contributions can aid network managers in assessing their PTP synchronicity systematically.

To avoid the disadvantages of a cloud-centric infrastructure, next-generation industrial scenarios focus on using distributed edge networks. Task allocation in distributed edge networks with regards to minimizing the energy consumption is NP-hard and requires considerable computational effort to obtain optimal results with conventional algorithms like Integer Linear Programming (ILP). We extend an existing ILP problem including an ILP heuristic for multi-workflow allocation and propose a Particle Swarm Optimization (PSO) and a Deep Reinforcement Learning (DRL) algorithm. PSO and DRL outperform the ILP heuristic with a median optimality gap of and against . DRL has the lowest upper bound for the optimality gap. It performs better than PSO for problem sizes of more than 25 tasks and PSO fails to find a feasible solution for more than 60 tasks. The execution time of DRL is significantly faster with a maximum of 1 s in comparison to PSO with a maximum of 361 s. In conclusion, our experiments indicate that PSO is more suitable for smaller and DRL for larger sized task allocation problems.

Network experiments using real hardware are typically expensive and time-consuming. Multiple solutions exist to reduce costs, in particular network emulation, or simulation of performance metrics. However, each solution impacts the quality of experimental results, in particular concerning realism and precision. We propose HVNet, a novel approach to create virtualized topologies on a single host utilizing real networking hardware. Relying on real hardware, our approach offers realistic network behavior and high-precision measurements. HVNet enables measurements on flexible network topologies avoiding the drawbacks of the alternative solutions. We observed repeatable results with a small error margin and a low impact of the measurement setup on experimental results. Additionally, we compare latency and jitter distributions of HVNet and Mininet setups, observing an improvement factor of up to three orders of magnitude.

Modeling extreme latencies in communication net-works can contribute information to network planning and flow admission under service level agreements. Extreme Value Theory is such an approach that utilizes real-world measurement data. It is often applied without verifying the resulting model predictions on larger datasets. Here we show that such models can provide accurate predictions over larger datasets while being applied to 100 random network topologies and configurations. We found that applying derived models with a bounded tail to a twentyfold time period results in a prediction accuracy of 75% for extreme latency exceedances. Furthermore, we show that tail latency quantiles can be predicted on a flow level with median absolute percentage errors ranging from 0.7% to 16.8%. Therefore, we consider this approach to be useful for dimensioning networks under latency-constrained service level agreements.

Critical applications, such as industrial control systems or remote medical applications, require highly reliable networks. A key enabler of such applications are networks that deliver the required strict performance guarantees. A prominent tool for deriving such guarantees for networks and the involved components is network calculus (NC). Device specifics may have a stark influence on model characteristics, making modeling in heterogeneous environments work-intensive. OpenFlow and P4 are two approaches that emerged from the Software-Defined Networking (SDN) community making networks more flexible and, consequentially, even harder to model.In this work, we demonstrate a novel approach that uses NC to model such SDN-based devices despite their increased complexity. Abstracting away from overall device behavior, we initially model only the fundamental building blocks of SDN devices that define network device behavior. NC provides a framework to compose different NC models into a single model, which we use to combine the building blocks into a model that describes a network device program built from these building blocks. This approach allows for modeling a maximal number of devices with a minimal amount of measurements. We apply our approach to two different SDN devices, the Zodiac FX and the NetFPGA SUME. A comparison between the prediction of our composed models and real measurements reveals a prediction error below 1 %, thereby proving the validity of our approach.

Languages for programming data planes like P4 sparked a plethora of new applications in the data plane. The dynamic, evolving environment makes it challenging to understand what performance can be expected when running a program in a specific data plane target. However, knowing this is crucial for network operators when upgrading their networks. We present a framework for the reproducible analysis and modeling of P4 program components. By defining and generating precise specifications of the experiments, we separate fully auto-generated components from testbed- or target-specific parts. Measurement results are used to derive performance models automatically. These can then be used to compare the measured with the theoretical performance, or to model the cost of entire paths through the data plane. In two case studies, we use our framework to discover and model selected behavior for a DPDK-based software target and for the NFP-4000 SmartNIC platform.

—White Rabbit is a time synchronization technology based on the Precision Time Protocol. It is used to synchronize clocks between different entities on an Ethernet network. Promising sub-nanosecond accuracy it is well suited for time and latency sensitive distributed applications. This paper gives an overview of the functionality, performance and application domains of White Rabbit.

With increasing demands of highly reliable networks with bounded latency and low jitter, a lot of UltraLow Latency Network studies are in progress. This paper focuses on IEEE Time Sensitive Networking (TSN) and IETF Deterministic Networking (DetNet). We analyze the similarities and differences between these two networking standards and give a survey of the published standards and possible future work of the DetNet and TSN Task Groups.

In recent years, multiple security incidents involving Certificate Authority (CA) misconduct demonstrated the need for strengthened certificate issuance processes. Certificate Transparency (CT) logs make the issuance publicly traceable and auditable. In this paper, we leverage the information in CT logs to analyze if certificates adhere to the industry's Baseline Requirements. We find 907 k certificates in violation of Baseline Requirements, which we pinpoint to issuing CAs. Using data from active measurements we compare certificate deployment to logged certificates, identify non-HTTPS certificates in logs, evaluate CT-specific HTTP headers, and augment IP address hitlists using data from CT logs. Moreover, we conduct passive and active measurements to carry out a first analysis of CT's gossiping and pollination approaches, finding low deployment. We encourage the reproducibility of networkmeasurement research by publishing data from active scans, measurement programs, and analysis tools.