We present a hybrid system spanning a fixed-function microarchitecture and a general-purpose microprocessor, designed to amplify the throughput and decrease the power dissipation of collision detection relative to what can be achieved using CPUs or GPUs alone. The primary component is one of the two novel microarchitectures designed to perform the principal elements of broad-phase collision detection. Both microarchitectures consist of pipelines comprising a plurality of memories, which rearrange the input into a format that maximises parallelism and bandwidth. The two microarchitectures are combined with the remainder of the system through an original method for sharing data between a ray tracer and the collision-detection microarchitectures to minimise data structure construction costs. We effectively demonstrate our system using several benchmarks of varying object counts. These benchmarks reveal that, for over one million objects, our design achieves an acceleration of 812 × relative to a CPU and an acceleration of 161 × relative to a GPU. We also achieve energy efficiencies that enable the mitigation of silicon power-density challenges, while making the design amenable to both mobile and wearable computing devices.

Algorithms can be accelerated by offloading computeintensive operations to application accelerators comprising reconfigurable hardware devices known as Field Programmable Gate Arrays (FPGAs). We examine three types of accelerator programming model – master-worker, message passing and shared memory – and a typical FPGA system configuration that utilises each model. We assess their impact on the partitioning of any given algorithm between the CPU and the accelerators. The ray tracing algorithm is subsequently used to review the advantages and disadvantages of each programming model. We conclude by comparing their attributes and outlining a set of recommendations for determining the most appropriate model for different algorithm types.

Collision detection is a vital component of applications spanning myriad fields, yet there exists no means for developers to analyse the suitability of their collision detection algorithms across the spectrum of scenarios that could be encountered. To rectify this, we propose a framework for benchmarking interactive collision detection, which consists of a single generic benchmark that can be adapted using a number of parameters to create a large range of practical benchmarks. This framework allows algorithm developers to test the validity of their algorithms across a wide test space and allows developers of interactive applications to recreate their application scenarios and quickly determine the most amenable algorithm. To demonstrate the utility of our framework, we adapted it to work with three collision detection algorithms supplied with the Bullet Physics SDK. Our results demonstrate that those algorithms conventionally believed to offer the best performance are not always the correct choice. This demonstrates that conventional wisdom cannot be relied on for selecting a collision detection algorithm and that our benchmarking framework fulfils a vital need in the collision detection community. The framework has been made open source, so that developers do not have to reprogram the framework to test their own algorithms, allowing for consistent results across different algorithms and reducing development time.

embark initiative Investing in People and Ideas Algorithm Myriad broad phase collision detection data structures and algorithms exist. We chose the simplest data structure, the Axis-Aligned Bounding Box (AABB), as its simplicity permits efficient hardware implementation. In software, AABBs are typically tested for collision using a sweep and prune algorithm (Cohen, Lin, Manocha & Ponamgi 1995), which achieves efficiency by considering spatial coherence between frames. However, we chose the more elementary O(n2) brute force method as it permits a more optimized hardware implementation. The brute force algorithm is Input: n AABBs Output: Indices of colliding AABB pairs

Broad phase collision detection is a vital task in most interactive simulations, but it remains computationally expensive and is frequently an impediment to efficient implementation of realtime graphics applications. To overcome this hurdle, we propose a novel microarchitecture for performing broad phase collision detection using Axis-Aligned Bounding Boxes (AABBs), which exploits the parallelism available in the algorithms. We have implemented our microarchitecture on a Field-Programmable Gate Array (FPGA) and our results show that this implementation is capable of achieving an acceleration of up to 1.5× over the broad phase component of the SOLID collision detection library, when considering the communication overhead between the CPU and the FPGA. Our results further indicate that significantly higher accelerations are achievable using a more sophisticated FPGA or by implementing our microarchitecture on an Application-Specific Integrated Circuit (ASIC).

In this paper, we outline the design and implementation of an FPGA-based nu merical integrator that will ultimately form the basis of our FPGA-based physics engine. Physics engine s are considered one of the most important of a multitude of components requesting CPU time in a modern compu ter game, and so we propose offloading aspects of this physics computation to an FPGA-based physics engine. We aim to ameliorate the speed of the physics computation in concert with the other game components. Cur rently, our physics processor uses the fourth-order Runge-Kutta numerical integration algorithm to solve the or dinary differential equations used in game physics. Our analyses indicate that the performance of our phys ics processor should surpass that of the equivalent software executing on a CPU when several objects are simulate d.

We outline the design and implementation of an FPGA-based numerical integrator that will form the basis of our FPGA-based physics engine. Physics engines are considered one of the most important of a multitude of components requesting CPU time in a modern computer game, and so we propose offloading this physics computation to an FPGA-based physics engine. Moreo ver, we suggest inserting FPGAs into PCs, as the FPGAs' reconfig urability could be used to accelerate a wide range of applications; when the user is playing games, the FPGA could be configured to accelerate game physics, as outlined here. Our physics proces sor uses the fourth order Runge-Kutta numerical integration al gorithm to solve the ordinary differential equations used in game physics. Our current analyses indicate that the performance of our physics processor should surpass that of the equivalent soft ware executing on a CPU when several objects are simulated. Ordinary differential equations (ODEs) describe the dynamic behaviour of objects, and so form the basis of game physics. To solve ODEs computationally, a numerical integration algo rithm is typically employed. Due to the essentiality of ODEs to game physics, we began our implementation of the field- programmable physics processor with a numerical integrator. -