The spatial resolution and high sensitivity of tip-enhanced Raman spectroscopy allows the characterization of surface features on a nano-scale. This technique is used to visualize silicon-based structures, which are similar in width to the transistor channels in present leading-edge CMOS devices. The reduction of the intensive far-field background signal is crucial for detecting the weak near-field contributions and requires beside a careful alignment of laser polarization and tip axis also the consideration of the crystalline sample orientation. Despite the chemical identity of the investigated sample surface, the structures can be visualized by the shift of the Raman peak positions due to the patterning induced change of the stress distribution within lines and substrate layer. From the measured peak positions the intrinsic stress within the lines is calculated and compared with results obtained by finite element modeling. The results demonstrate the capability of the tip-enhanced Raman technique for strain analysis on a sub-50nm scale.

Local stress fields in strained silicon structures important for CMOS technology are essentially related to size effects and properties of involved materials. In the present investigation, Raman spectroscopy was utilized to analyze the stress distribution within strained silicon (sSi) and silicon-germanium (SiGe) island structures. As a result of the structuring of initially unpatterned strained films, a size-dependent relaxation of the intrinsic film stresses was obtained in agreement with model calculations. This changed stress state in the features also results in the appearance of opposing stresses in the substrate underneath the islands. Even for strained island structures on top of silicon-on-insulator (SOI) wafers, corresponding stresses in the silicon substrate underneath the oxide were detected. Within structures, the stress relaxation is more pronounced for islands on SOI substrates as compared to those on bulk silicon substrates.