In this paper we present a unique approach towards parallelizing the Software MPEG-2 Video Encoder. The approach involves the division of encoding process spatially, between four similar processors with distributed memory system, in such a way that each frame of the input video sequence is divided into four separate sections, each individually processed by a processor. The results thus produced were compared with those of the Sequential Encoder for a number of different input bitstreams and a speedup in the range of 3 to 3.5 with four processors was successfully obtained.

H.264 or AVC (Advanced Video Coding) is a latest digital video codec standard which was developed as an answer to the growing demand for better compression in a wide range of applications and for improved network friendliness. H.264 is able to deliver a compression efficiency of up to 50% over a wide range of bit rates and video resolutions compared to previous standards (e.g. MPEG2 or H.263). The downside is that the H.264 decoder complexity is nearly four times higher than the previous standards. Hence a powerful hardware platform is required to provide real-time performance of H.264 in today's high-end applications like HDTV. We present an innovative Hardware architecture to perform real-time H.264 CABAC decoding using Finite State Machines (FSMs) for decoding of syntax elements. This architecture delivers a throughput of 1 bin per cycle @ 180MHz as reported by Synopsys Design Compiler.

This paper describes an innovative, pipelined, cache-based architecture for a motion estimation coprocessor based on a predictive/recursive algorithm whose computational complexity is low and independent from the search window. The algorithm and the associated architecture yields itself very well to low-power, low-cost video capture devices with low processing capabilities, such as mobile phones, PDAs, or handhelds. The synergy between architecture and algorithmic features allows a high quality output, low memory to cache bandwidth requirements, and a search window independent implementation for H.264/AVC real time video encoding of up to high definition video (HDTV).

This paper describes an innovative algorithm for adding SVC Spatial Scalability to all existing non-scalable H.264/AVC video streams. The algorithmic system builds on a full-decode-full-encode method of conversion and employs reuse of available data by an efficient downscaling of video information for different layers, thus reducing the complexity of the algorithm by manifold whilst maintaining a high coding efficiency. The complexity is further reduced by bypassing of various time consuming processes of the encoding process by the use of sharing and reuse of video information coming from original bitstream. Extensive analysis has been done to evaluate the gains in the coding efficiency and complexity of the algorithm using the full-decode-full-encode approach as a benchmark. The ultimate reduction in complexity is at least 60% from full-decode-full-encode while maintaining the output video quality. The modular nature of the algorithm is designed to be easily adaptable to other scalable video standards as well.

This paper describes a transcoding algorithm able to transcode a compressed video bitstream into a WMV9 (VC1) compliant bitstream. A Closed-Loop Spatial Domain Transcoding approach, modeled on the Cascaded Pixel Domain Transcoder (CPDT) is presented here. It incorporates reusing of information obtained from the input bitstream. To enhance the performance of the transcoder, an approach for pipelining the encoder/decoder processes in the transcoder is proposed here. These modifications can be easily adapted to all the transcoders producing WMV9 as output, the input for whom may include video streams of type MPEG-2, MPEG-4 or H.264. As a proof of concept, the suggested approach has been applied to the case of MPEG-2 to VC1 transcoding. Extensive analysis has been performed and the ultimate gain in transcoding speed achieved for the presented approach compared with MPEG-2 to VC1 CPDT, is in the range of 3 to 7 times faster than CPDT.