What if machine learning could predict inverter harmonics before prototyping? Conventional pulse width modulation (PWM) techniques in cascaded H-bridge (CHB) multilevel inverters (MLIs) struggle with low-frequency odd harmonics, high switching losses, and uneven power distribution, limiting efficiency and adaptability in industrial applications. For the first time, this article introduces a support vector machine (SVM)-based harmonic prediction algorithm integrated with a high-definition multicarrier PWM (HD-MCPWM) technique for MLIs. The SVM algorithm forecasts lower order odd harmonics (5th, 7th, 11th, and 13th) and determines optimal switching angles. Meanwhile, HD-MCPWM ensures uniform switching losses and stable inverter output currents. Together, this approach achieves 4.47% harmonic distortion with a 33.3% reduction in switching losses. Validated through theoretical models, simulations, and prototypes, the proposed technique delivers 97.8% peak efficiency, demonstrating its superiority over conventional methods as a reliable, efficient solution for MLIs in industrial applications.

Traditional PWM techniques in cascaded H-bridge multilevel inverters often lead to increased low-frequency harmonic distortion and higher switching losses, impacting overall efficiency in industrial settings. This paper presents a novel high-definition multicarrier pulse width modulation (HD-MCPWM) technique aimed at reducing lower-order harmonics (5th, 7th, 11th, and 13th) in the AC output, while ensuring balanced switching losses across semiconductor cells and delivering consistent current with reduced peaks. For the first time, the HD-MCPWM incorporates a machine learning algorithm to predict total harmonic distortion (THD%) without relying on complex non-linear equations, identifying optimal switching angles that minimize odd harmonics. This method reduces THD to 4.47% achieving up to 97.8% efficiency. Validation through theoretical model and simulations demonstrates its advantages over conventional PWM techniques.

On the whole, the number of electric vehicles (EVs) has been rising quickly worldwide. Meeting the high-performance power-conversion demands to facilitate a more sustainable future requires isolated DC/DC converters like: phase shifted full bridge (PSFB) DC/DC converter. This article presents the development of artificial intelligence (AI)-based inductor current monitoring and anomaly detection in a pulse-width modulation (PWM) controlled phase shifted 3-level PSFB converter to be adopted for fast EV charger applications. A novel model has been proposed with a new chronological long short-term memory (LSTM) based autoencoder (AE) or LSTM-AE model which results in detection and diagnosis of such anomalies. MATLAB/Simulink is utilized for the validation of fast charging analysis and in the anomaly identification methodology, Python has been used as a programming language.

The rapid proliferation of electric vehicles (EVs) has led to the emergence of the need for efficient and fast charging systems. This paper addresses the development of an artificial intelligence (AI) based model to predict the optimized peak inductor current in a high-definition sinusoidal pulse width modulation (HD-SPWM) controlled 3-level dual active bridge (DAB) converter for a fast charging electric vehicle application. Although the DAB converter topology has numerous advantages, which can be used for various power distribution systems due to the bidirectional power flow and high-power density, the DAB converter's performance level is significantly dependent on the performance of the model since the inductor current should accurately be predicted. The proposed AI-based model, with a novel long short-term memory (LSTM) approach, can predict the inductor current accurately based on the anticipated input parameters. The MATLAB/SIMULINK simulation platform has been used to train the model, indicating that the model can be robust under a wide arrangement of operating conditions. The error-free inductor current prediction would significantly affect the controller with excellent precision, minimal losses, and high-speed charging of the electric vehicle. A series of simulation tests has been executed to expose the promiscuity of the proposed AI-based model with conventional line-up.

Driven by the demand for enhanced performance and efficiency of power electronic converters, this article presents a novel architecture for the high-definition sinusoidal pulseidth modulation technique. The proposed architecture combines the two dc-linked capacitor voltages and three reference voltage signals of a three-level neutral-point clamped (NPC) inverter to effectively address the imbalances in dc-linked capacitor voltages, even during the transient conditions. By adding an offset voltage to the three-phase reference voltage, the proposed strategy achieves robust voltage balancing. A mathematically formulated voltage balancing algorithm has been developed to calculate the injected zero-sequence voltage and compensating neutral-point voltage, enabling versatile operation across a wide range of power factor angle and modulation index. The proposed approach offers several advantages, including high-resolution and high-frequency performance, reduced switching losses, higher efficiency, and minimal field-programmable gate array resource utilization. Notably, it eliminates the need for closed-loop controllers and three-phase current information, resulting in a favorable balance between functionality and design complexity. The exceptional capabilities and potential of the proposed strategy are showcased through detailed design considerations, theoretical analysis, and experimental validation on a small-scale NPC inverter prototype. Furthermore, to highlight its efficacy, a comprehensive comparative analysis has been conducted, evaluating the proposed architecture against recently-reported similar techniques.

The cost of power converters plays a crucial role in designing high-voltage off-board electric vehicle (EV) chargers. A multilevel topology, especially, dual active bridge (DAB) converter is utilized in a fast EV charging infrastructure, which exhibits the most attractive balance between cost, size, control simplicity, and efficiency. This article implements the modern high-definition sinusoidal pulse width modulation (HD-SPWM) technique in a DAB converter, to ensure a 3-level output voltage for a wide range of the duty cycle vs phase shift (PS) variations. Implemented in a fast EV charging application, this scheme provides a cost-effective bidirectional solution. This bidirectional setup facilitates vehicle-to-grid (V2G) and grid-to-vehicle (G2V) applications. The newly introduced robust machine learning (ML) control strategy allows a precise control of the DC/DC converter, resulting in a higher efficiency over a wide range of phase shift variation. The proficiency of the proposed fast charging architecture is analyzed using the MATLAB/Simulink platform and compared with the conventional DAB modulation techniques, to showcase its adoption in industrial applications.

This paper presents a novel approach that integrates a support vector machine (SVM) regression model with a nine-level cascaded H-bridge multilevel voltage source inverter triggered by LSPWM. The objective is to optimize low-frequency odd harmonics in the output voltage while achieving a uniform output current, thus improving the power quality of the inverter. Specifically, the focus is on predicting the fifth, seventh, and eleventh order harmonics from the phase voltage and optimizing their amplitudes. The innovative SVM-based LSPWM technique predicts the best-fitted amplitude range of odd harmonics under variable modulation indices and switching angles using simplified low-order equations, offering an alternative to complex nonlinear equations. Simulation and experimental results closely align with theoretical analysis, affirming the adaptability of the proposed work for industrial applications.

The output of photovoltaic (PV) systems is significantly impacted by the vagaries of ambient temperature, solar irradiance, and environmental fluctuations. To achieve the utmost attainable power from PV systems, it is desired to be efficient at the maximum power point in diverse weather climates. Maximum power point tracking (MPPT) is used to schedule a designated location from where the highest power can be harvested. In the context of solar photovoltaic systems connected with DC microgrid platforms, this study introduces a recently developed drone squadron optimization (DSO) scheme that tracks the global maximum power point under PSCS difficulties. Furthermore, an exhaustive comparative analysis has been presented among particle swarm optimization (PSO), cuckoo search algorithm (CUSA), and grey wolf optimization (GWO) under different operating environments to endorse the supremacy of the nominated technique. The suggested method performs noticeably faster than many other methods currently in use, and in addition to offering the highest power, it can also use bidirectional power flow regulation in both constant and variable air conditions. Lastly, an MPPT system interfaced with the DC microgrid based on DSO ensures a sustainable and reliable architecture to provide at load in low power generating situations.

In this paper, we analyze the reliability of a power system employed in large data centers with high power demand. As an emergency response system, it is crucial to ensure that the data center retains its functionality in the event of an emergency. This assessment aims to have a seamless transition with high reliability. Continuous Markov process (CMP) and Monte Carlo simulation (MCS) provide an exponential index of reliability based on the number of nines in the result. The model under test uses a four-state matrix/equation based on the availability and failure states for CMP and MCS. Finally, a discussion provide insight in how these two methods achieve similar results with different mathematical approaches.

The conventional inverter for electric vehicle (EV) application exhibits lower efficiency and includes a higher percentage of low-frequency odd harmonics. These issues lead to the use of large LC filters, which increases weight, volume, budget of the system and deteriorates the power quality of the EV. In order to address the issue, this paper proposes a selective harmonic eliminated multicarrier pulse width modulation (SHE-MCPWM) method for a 5-level cascaded H-bridge (SL-CHB) inverter, which generates higher voltage gain with lower harmonic distortion, reduces the voltage stress on the semiconductor switches, and provides a better solution to the EV power quality problems. The proposed technique also introduces a new harmonic elimination scheme that utilizes the SHE-MCPWM pulse's switching angles to facilitate online modification of modulation index. The fundamental analysis of the SHE-MCPWM demonstrates a strong congruence with the simulated and experimental results, which approves the acceptability of the proposed technique over previously published works under consideration.

The conventional modulation schemes of the cascaded H-bridge dc/ac converter generate a higher percentage of low-frequency harmonics at the output voltage and lead to discontinuous high-peak output current that causes a detrimental effect on the industrial motor drive systems. Addressing this concern, this article proposes an improved multicarrier pulsewidth modulation (MCPWM) technique that reduces harmonic content from the ac output voltage while achieving continuous output current with reduced peak magnitude. The proposed technique introduces a harmonic mitigation algorithm that adopts the switching angles of the MCPWM pulse to support the online adjustment of the modulation index and the switching frequency of the semiconductor switches. The main emphasis of this research is to mitigate the fifth, seventh, and eleventh order harmonics from the inverter output voltage and to define a new range of switching angles where the respective harmonics exhibit the lowest amplitude. Moreover, the work offers a novel approach to estimate the switching angles of the MCPWM pulse-train in real-time operation without solving the complex nonlinear equations. The proposed modulation technique has the benefits of low-frequency harmonic mitigation, low-processing time, and requirement of a minor segment of medium-sized FPGA, thereby it provides a good tradeoff between complex design and better performance. The feasibility and effectiveness of the proposed technique have been identified by a comprehensive comparison with the recently-reported schemes. Furthermore, theoretical, simulation, and experimental results using an FPGA-based three-phase cascaded H-bridge multilevel inverter prototype are included to justify the suitability of the proposed technique.

The intermittent nature of renewable energy generation and the variable AC and DC loads are major factors that offer great challenges in power management for AC/DC hybrid microgrids. In this context, this paper presents a coordinated AC frequency vs DC voltage control (CFVC) scheme for managing contemporary renewable energy-based hybrid AC/DC microgrids. The proposed control strategy enables appropriate power interactions between the AC and DC subgrids while sharing power fluctuations in a coordinated way. Both the AC and DC subgrids support each other in accordance with their normalized relative changes in AC frequency and DC voltage, respectively. The proposed CFVC scheme is designed using fractional-order-proportional-integral-derivative (FOPID) controllers, and bacterial-foraging optimization (BFO) method is employed for calculating the design parameters, viz. the controller gains and set-point orders. A typical photovoltaic (PV) wind-battery-based hybrid AC/DC microgrid is modelled and investigated, and the usefulness of the proposed scheme is validated under the renewable energy variations and load perturbations.

Field-programmable gate array (FPGA)-based multi-carrier pulse-width modulation (MCPWM) generation technique is desirable for high-frequency dc/ac converter application where a fast-switching response is the primary concern. This paper offers an FPGA-based high-frequency, multi-carrier phase disposition pulse-width modulation (PD-PWM) generation strategy that can support the requirements of modern fast-switching semiconductors. The FPGA architecture employs several pre-formulated VHDL-coded algorithms to develop a set of high-speed PD-PWM gating signals for the multilevel dc/ac converter. The proposed technique is verified through a Xilinx Spartan-6 FPGA-triggered cascaded H-bridge multilevel inverter (CHB-MLI) to quantify its merits among all the recently-reported similar architectures under study.

Neutral Point Clamped (NPC) inverter has attracted special attention in the field of medium voltage drives and Electric Vehicle (EV) applications. In conventional three- or higher-level NPC topologies, the issues related to the higher harmonic content and electromagnetic interference (EMI) stresses on the semiconductor switches, still exist. This paper proposes a modified pulse-width modulation (P...

Incorporation of transformer in grid-photovoltaic (PV) interfaces makes the systems bulky and expensive, and reduces the system efficiency. Consequently, in recent years, researchers have proposed many transformers-less inverter topologies for grid-PV interface applications. Among them, the H5 topology is one with the simplest structure, least switches, and higher efficiency. However, its ground-leakage current repression property is unsatisfactory due to its asymmetry structure and switch-junction capacitance effects. From the aspect of single-phase transformer-less grid-PV interface applications, this study proposes an improved H5 topology, namely 2D-H5 topology, by incorporating a capacitor divider with a clamp branch consisting of two blocking diodes in the basic H5 structure in order to maintain constant common-mode (CM) voltage. The constant CM voltage will cause no CM (i.e. ground-leakage) current through the stray capacitance between the PV array and the ground. Besides, the proposed topology provides the same differential-mode characteristic as good as in a unipolar modulation full-bridge (H4) inverter for ensuring quality of grid injected power. The proposed topology has been analysed in detail, and verified with satisfactory simulation and experimental results in comparison to the existing transformer-less H5 topology. The proposed improvement enables a reduction in the ground-leakage current in conformity with PV interface standards.

In recent years, there had been a stable development of the switched reluctance machine (SRM) functioning in motoring mode; though, its operation as a generator remains under study. This paper focuses an insight into the pulse width modulated (PWM) control technique for switched reluctance machine (SRM), functioning as a generator at both high and low-speed applications. A comparative assessment among different control strategies of switched reluctance generator (SRG) has been performed to verify the superiority of the proposed work among earlier-reported similar works. The simulated results hold a good agreement with the mathematically formulated theoretical calculations which validate the practicability of the proposed work. Due to the simplicity of the control architecture and flexibility in operation over a broad range of speed, the proposed control technique is found suitable to be adopted in variable speed applications.

Modulation Index (MI) variant sinusoidal-pulse-width-modulation (SPWM) is desirable for converter applications in maintaining output voltage under variable input and load environments. Enabling a high-speed switching and resolution, field-programmable gate-arrays (FPGAs) have been dominating in digital control of power electronics. This paper proposes an FPGA-based high-frequency high-resolution digital variable-modulation-indexed sinusoidal-pulse-width-modulation (DVMI-SPWM) generator architecture which can support the requirements of modern high-frequency switching and the MI adjustment ability in voltage-source-inverter (VSI) applications. A mathematically formulated optimized finite-state-machine (FSM) architecture is introduced, which adopts MI of SPWM by adjusting the duty-cycle values of SPWM pulses based on the measured feedback signal. The design employs a minor segment of medium-sized FPGA and, thereby, provides a good trade-off for multi-functional and larger schemes. The post-design simulation and experimental results validate that compared to the earlier-reported architectures, the proposed DVMI-SPWM architecture is the most appropriate one for variable MI applications with improved performance such as lower power consumption, lower harmonic distortion, and higher resolution.

Neutral-point clamped multilevel inverter (NPC- MLI) has become a widely accepted choice in the area of industrial drive applications. The problem concerning the higher harmonic content and the higher switching frequency still exist in the conventional NPC-MLI topology. In this paper, a phase disposition pulse width modulation (PD-PWM) technique is proposed for a three-phase five-level NPC-MLI, which is proficient in reducing the high-frequency weighted total harmonic distortion (WTHD) content of the inverter output voltage by employing a mathematically formulated harmonic mitigation algorithm. The experimental results of a three-phase NPC-MLI prototype hold a good resemblance with the theoretical calculation and simulated results of the proposed control scheme. Besides, a quantitative comparative investigation affirms that the proposed PD-PWM technique exhibits the lowest WTHD content among all the earlier- proposed PWM schemes under study, which verifies the preeminence of the proposed work.

Neutral-point clamped Multilevel inverter (NPC-MLI) has transformed into a broadly accepted choice in the field of electric vehicle (EV) applications. In the traditional NPC-MLI-fed EV system, the problem regarding the higher harmonic content and the lower switching frequency still persists. In this paper, a phase opposition disposition pulse width modulation (POD-PWM) technique is proposed for a three-phase NPC-MLI, which is proficient in reducing the high-frequency weighted total harmonic distortion (WTHD) content of the inverter output voltage by employing a double Fourier integration-based harmonic mitigation algorithm. The experimental results of an FPGA-based NPC-MLI prototype hold a good resemblance with the theoretical analysis and simulated results. In addition, a comparative investigation affirms that the proposed strategy exhibits the highest efficiency and lowest WTHD content among all the previously-reported PWM schemes under study, which verifies the adaptability of the proposed work in electric vehicle applications.