We present a study of accuracy and timing limitations in current-steering digital-to-analog converters (DACs). Effects of limited output impedance and device mismatches on the DAC performance are discussed and observed for a 10-bit DAC operating at 4 GS/s. These limitations are also studied across 180, 90, and 65 nm CMOS process technologies.
In this chapter a detailed analysis on the operation and architecture of the voltage-controlled oscillator (VCO)-based ADC is presented. The VCO-based quantizer is analyzed for two different architectures, one using a frequency-to-digital converter (FDC) the other a time-to-digital converter (TDC). Theoretical equations are derived to determine the resolution of these quantizers and verified through a VerilogA model.
ii DEDICATION vi ACKNOWLEDGMENTS vii VITA viii PUBLICATION viii FIELD OF STUDY viii TABLE OF CONTENTS ix LIST OF TABLES xii LIST OF FIGURES xiii LIST OF ABBREVIATIONS xvi LIST OF SYMBOLS xvii CHAPTER 1: Introduction 1 1.1 Background 2 1.2 Motivation 2
In the following sections, both quantizers are compared in the presence of circuit nonidealities such as VCO nonlinearity, phase noise, and sampling clock jitter. These nonidealities are added to the VerilogA model, and theoretical equations are derived to verify the effects on each quantizer. Although the FDC has been widely adopted due to its inherent first-order noise shaping characteristic, the noise shaping is shown to degrade in the presence of phase noise and clock jitter. Other circuit nonidealities exist but are ignored in this analysis since these quantizers are highly digital circuits.
The semiconductor industry is lacking qualified integrated circuit (IC) test engineers to serve in the field of mixed-signal electronics. The absence of mixed-signal IC test education at the collegiate level is cited as one of the main sources for this problem. In response to this situation, the Department of Electrical and Computer Engineering at the Ohio State University, Columbus, has partnered with Texas Instruments to establish an IC test-engineering-oriented course. The course objectives are to familiarize students with industrial testing techniques and to help students obtain the fundamental skill sets required to be competent mixed-signal IC test engineers. A novel laboratory pedagogy is developed to achieve these objectives. The results of the classroom assignments and the feedback provided by students, faculty, and industry representatives indicate that the approach has successfully achieved these goals.