Ring oscillators having integrated-optical readout are realized in GaAs-AlGaAs field-effect transistor self-electro-optic-effect-device (FET-SEED) technology-a monolithic integration technology for FET's and normal-incidence multiple-quantum-well modulators and detectors. Good agreement between simulated and measured DC-inverter-transfer characteristics is shown. At one bias point, ring oscillator frequencies correspond to unity fan-in and fan-out delay values of 129.5 ps/stage. The power-delay product at this bias point was 306 fj. Measurements were made on circuits whose transistors had a transconductance of about 80 mS/mm. Simulations of inverter delay are discussed, including load capacitances, and are found to be in good agreement with experiment.< >

Integration of active optical elements (GaAs-based multiple quantum-well pin diode modulators) with semiconductor microelectronics (GaAs-based doped-channel HFETs) is obtained. We discuss the improved sensitivity (less than 100 fJ optical input energies) and higher operation rates (to 650 Mb/s) that result from this combinations. We do so within the context of simple receiver/transmitter-pair circuits containing at most 5 transistors and 6 diodes.

The structure, processing, and performance of arrays of integrated field-effect transistor-self-electrooptic effects devices (FET-SEEDs) consisting of doped-channel field-effect transistors, multiple quantum-well (MQW) modulators, and p-i-n MQW detectors are discussed. The performance of the FETs and SEEDs such as g/sub m/ and contrast, is equivalent to that obtained when they are made separately. Typical values are g/sub m/=80 mS/mm and contrast of 3. The largest arrays contain 128 circuits. The circuits operate at speeds as fast as 500 Mb/s, with optical input switching energy of approximately=400 fJ. At 170 Mb/s, the required optical input switching energy is approximately=70 fJ. This optical energy is at least a factor of 20 less than for symmetric SEEDs (S-SEEDs) with the same optical window sizes. Hence, FET-SEEDs provide superior performance compared to conventional S-SEEDs. >

The authors experimentally demonstrate the operation of a fully integrated optoelectronic circuit with optical input and output consisting of a p-i-n photodetector and load resistor, a depletion-mode GaAs-Al/sub x/Ga/sub 1-x/As heterostructure field-effect transistor (HFET) and self-biased HFET load, together with an output GaAs-Al/sub x/Ga/sub 1-x/As multiple quantum-well optical modulator. All elements have been monolithically integrated within a 50- mu m*50- mu m area. A low optical power input causes a modulation of a higher-power output, demonstrating optical signal amplification.<>

We describe symmetric self-electro-optic effect devices (S-SEEDs) with clamping diodes connected to the center node of the devices to ensure both diodes of the S-SEEDs have an electric field across them at all times. These diode-clamped S-SEEDs operate over a greater wavelength range, with greater powers before saturating, and have lower optical switching energies compared to conventional S-SEEDs. An 8×8 array of diode-clamped S-SEEDs has been built and tested. We have demonstrated bistable operation with voltage swings of only 2 V over a wavelength range of 15 nm. Required optical switching energies of 340–580 fJ were measured at input powers from 500 nW to 100 μW for devices with 10×10 μm mesas. This is the lowest reported switching energy for any SEED with acceptable bistable characteristics.

We have demonstrated a smart pixel prototype field-effect transistor-self-electro-optic effect device (FET-SEED) integrated optoelectronic amplifier utilizing process technology suitable for flexible design and fabrication of high-yield optoelectronic circuits. A single MBE growth sequence provides for quantum-well modulators, photodiodes, doped channel MIS-like field-effect transistors (DMT's), and resistors. The device dimensions are controlled in a planar technology using ion implantation and selective plasma etching for isolation and contacting. Results demonstrate optical signal amplification in a fully integrated circuit. This technology will enable increased functionality by providing digital electronic processing between optical input and output.

Two-dimensional arrays of logic self-electrooptic effect devices (L-SEEDs), consisting of electrically connected quantum-well p-i-n diode detectors and modulators are demonstrated. The topology of the electrical connections between the detectors is equivalent to the connections between transistors in CMOS circuits. Three different L-SEED arrays were built and tested. Each element in one array can implement any of the four basic Boolean logic functions (i.e., NOR, NAND, AND, OR). Each element in the second L-SEED array can implement the function E=AB+CD. The third L-SEED array consists of 32*16 arrays of symmetric SEEDs (S-SEEDs) connected with optoelectronic transmission gates. Photonic switching nodes, multiplexers, demultiplexers, and shift registers have been demonstrated using this array. >

The self-electro-optic effect device (SEED) and the symmetric SEED (S-SEED) have demonstrated considerable applications for photonic switching and logic functionality. A SEED consists of a p-i-n, mesa diode, with a multiple-quantum-well structure for the i region. The symmetric SEED consists of two p-i-n mesa diodes connected in series. The S-SEED has been fabricated in functional arrays containing as many as 32×64 elements. The SEED and S-SEED are operated under a reverse bias, thus low reverse leakage is desired. As the magnitude of the reverse leakage current increases, more incident laser power is required to switch device states and then hold that state. Therefore, understanding the origins of the reverse leakage current and its dependence on mesa and array size is imperative for optimizing device performance.

Symmetric self-electro-optic effect devices (S-SEEDs) using extremely shallow GaAs/Al0.04Ga0.96As multiple quantum wells are demonstrated. By exploiting mainly exciton ionization, rather than the usual quantum-confined Stark shift, room-temperature optical bistability is obtained with no applied bias. The extremely shallow symmetric-SEED (symmetric E-SEED) exhibits contrast ratios (CRs)≂3.5, with biasses<5 V, demonstrating system applicability and compatability with electronics. Large system tolerances Δλ≂6 nm and maximum bistability loop width ≂70% are also obtained. Moreover, due to fast carrier escape times, the symmetric E-SEED exhibits useful CRs≳2 even at continuous-wave intensities ≳70 μW/μm2.

For optical processing to become a reality, large arrays of optical processing gates are required with low energies and fast switching speeds. Arrays of symmetric self electro-optic effect devices (S-SEEDs) with as many as 2048 devices (64 x 32) have been made using batch fabrication procedures that process an entire wafer of devices at once [1,2]. In this paper we describe the extension of that work to arrays with 8192 devices (128 x 64) and 32768 elements (256 x 128). We also demonstrate 8 x 16 arrays of symmetric SEED modulators [3] with individual electrical access to the devices. The performance and uniformity of the arrays are more than acceptable to continue systems experiments with these types of devices.

The division between optical processing and electronic processing with optical interconnections can be a fuzzy one at best. Because of the limited functionality acheivable in "all-optical" logic gates, a growing interest is seen in "optical" processing elements made using optoelectronic devices with greater functionality [1]. Large scale integrated optoelectronic chips of quantum well self electro-optic effect devices (SEEDs) have been made [2,3] with fast switching times and low operating voltages and energies. The processing elements in these chips, the symmetric SEEDs (S-SEEDs) [4], have limited processing capabilities, in that they are set-reset latches and can be made to perform logic functions by pre-setting the device to a given state. We can, in theory, achieve arbitrary logical functionality by using a separate group of quantum well detectors configured similar to the field effect transistors in CMOS and NMOS circuits to drive a S-SEED configured as an output modulator [5]. These devices have many desirable qualities including, time sequential gain, effective input-output isolation, signal level and timing regeneration, wavefront quality restoration, and operation over decades in power levels due to the differential nature of the devices. In this paper, we describe the first integrated arrays of these devices, with each device or processing element having the functionality required to implement photonic switching nodes. Since these arrays were made using the same batch fabrication procedures that have yielded the large S-SEED arrays [6], we feel that the capability now exists to make large scale optoelectronic circuits of arbitrary functionality.

We have used an electrical technique to determine the ambipolar lifetime in p-i-n GaAs/AlGaAs self-electro-optic-effect devices in which the i region consists of a multiple quantum well structure (MQW). From an analysis of the voltage drop in the i region obtained from the forward current-voltage characteristics, values for the ambipolar lifetimes are derived for diodes with different MQW. A value of 80–90 ps is determined for the ambipolar lifetime which is found not to change significantly when the AlxGa1−xAs barrier thickness or composition is reduced from 65 to 35 Å or x∼0.3 to 0.2, respectively, in the MQW. Since these changes in the barrier have previously been shown to improve photoresponse efficiency of the p-i-n diode, it is inferred that the carrier escape and collection times are smaller than 80–90 ps in devices with thin (35 Å) or low (x∼0.2) AlxGa1−xAs barrier.

Arrays of symmetric self electro-optic effect devices (S-SEEDs) have been made with low operating energies and fast switching speeds [1,2]. The device has the characteristics of a set-reset latch, although it can be made to do logic functions such as a NOR gate by presetting the state of the device before the application of the data inputs [3]. Logic gates that can perform more complex functions without preset beams may be realized by using electrically connected detectors configured like transistors in NMOS or CMOS circuits together with an output S-SEED to provide the output beams [4]. In this paper, we describe the first integrated arrays of these logic gates, each of which can perform the four basic logic functions without the use of preset beams. Each logic gate in the array consists of six quantum well p-i-n diodes, four input diodes configured similar to transistors in a CMOS NOR gate, and two output diodes (i. e. a S-SEED) that provide a set of complementary output beams. Like the S-SEEDs, this device has time sequential gain, in which the low power input beams set the state of the device and a set of equal higher power clock beams subsequently read the state. This device retains many desirable qualities of the S-SEED such as signal regeneration and retiming, wavefront restoration, and operation over several decades in power levels due to its differential nature. Because the logic gate contains only quantum well diodes, the same batch fabrication procedures [1] used for S-SEED arrays were used to make the arrays of these devices.