Time and frequency synchronisation are significant parts of the cell-search procedure and one of the first processing blocks within a mobile communication system. Particularly for an OFDM transmission within an initial synchronisation process, the algorithm has to deal with carrier frequency offsets up to several subcarrier spacings. To be able to still operate under those conditions, the cell-search procedure consists of different processing steps, combined in a hybrid algorithm. Beside good performance properties, hybrid algorithms lead to a high computational demand and implementation effort. To overcome these challenges, flexible architectures, which are able to select the most suitable algorithm during runtime, are the base for an efficient hardware realization. In this paper, as an example, we are introducing an hybrid initial synchronisation algorithm for an LTE-system, which still operates under the effect of a carrier frequency offset greater than the subcarrier spacing. Consecutively, we are showing a reconfigurable architecture as well as the results of an FPGA implementation of the time synchronisation part of that algorithm. The architecture is able to switch between different correlators, namely a reverse-auto, a cross-and a CP-based auto-correlation during runtime, which enables a flexible and low complexity realization of the computational complex synchronisation process.

The use of Orthogonal Frequency Division Multiplex (OFDM) modulation has become increasingly important for actual and future mobile communication systems [1]. Within this scope, Carrier Frequency Offset (CFO) compensation is indispensable [2]. Its underlying algorithm requires the calculation of trigonometric functions, which is difficult to achieve by hardware implementation in general. In this paper we propose a CFO compensation approach based on low complexity and hardware optimized linear function approximation. The Multiplier-less nonuniform Piecewise function Approximation (MPA) methodology significantly reduces the calculation effort of crucial algebraic terms. Matlab simulation is performed in order to prove the results in terms of feasibility. The compensation algorithm is also implemented in VHDL and synthesized as hard-wired Integrated Circuit (IC). A chip area of 0.034mm2, a frequency of 181MHz and a total power consumption of 18.62μW/MHz are obtained.

MIMO detectors are one of the most complex parts within a wireless communication system. In particular, for high throughput communication standards, like the 3GPP Long Term Evolution, reduced complexity detectors, which achieve a good BER performance are of major interest. Sphere decoder algorithms are one kind of tree search algorithms, which offer a good complexity-performance trade-off. In this paper we introduce a novel computation unit for a sphere decoder algorithm, which achieves an identical behavior compared to a complex sphere decoder, in terms of the BER performance and the number of visited nodes, by a reduced computational complexity. This is achieved due to calculating the Partial Euclidean Distance of the real and the imaginary part of a partial symbol vector totally independently from each other. For example, the number of adders is reduced by about 46% and the signal propagation delay is cut down by one adder stage for the computation unit. Furthermore, the comparator elements of the minimum unit are reduced by 60% and the signal propagation delay is cut down by two comparator stages.

Multiuser detection can be implemented at the sink of a sensor network to receive the various signals of its sensor nodes. This is a viable approach as long as the number of sensor nodes is small. In case of many nodes, decoding can be considered technically infeasible, but assuming low transmission activities, the sparse nature of the sensor signals can be utilized. In this paper, we propose a sphere decoding algorithm to perform maximum likelihood decoding based on an extended distance metric that takes the a priori probability into account. By intentionally violating the ideal check of the sphere constraint, many improbable transmit hypotheses can be dismissed early, thus reducing decoding complexity but without notable loss of quality.

To meet the requirements of modern, high throughput communication systems, like the 3GPP Long Term Evolution, which aims to achieve a peak throughput of 100 Mbit/s in the downlink and 50 Mbit/s in the uplink, MIMO is a key technology. Therefore, efficient MIMO detection algorithms have become of major interest. Iterative tree-search detectors offer a good trade-off between the computational complexity and the BER performance. All these detectors assume a QR decomposed channel matrix to transform the Maximum Likelihood problem into a tree structure and to define a criterion to prune branches early. This criterion can be described by the Partial Euclidean Distance. In this paper we consider an iterative tree-search detector, namely a K-best detector, in combination with a specific QR-decomposition algorithm to formulate a Modified Partial Euclidean Distance and to avoid square roots and divisions, which normally appear due to the QR-decomposition. Hence, in opposite to an usual, separate algorithm optimization, a combined optimization is described.

Due to the Multiple Input Multiple Output technology, applied in wireless communication, where a transceiver has to deal with multidimensional channels, the QR-decomposition is an often used preprocessing algorithm, especially for the design of iterative tree search detection algorithms. In this paper we introduce an efficient FPGA implementation of a QR-decomposition algorithm, which is designed for a MIMO detector developed in view of the Long Term Evolution (LTE). The proposed architecture is based on a line-by-line systolic array structure and reaches the peak matrix throughput, which is required to achieve the defined LTE peak data rate of a 2 × 2 MIMO constellation using a 20 MHz transmission bandwidth. In this paper we describe the architecture and FPGA implementation of the algorithm in detail and show the performance results of a Xilinx Virtex IV realization.

Since Multiple Input Multiple Output (MIMO) transmission has become more and more popular for current and future mobile communication systems, MIMO detection is a big issue. Linear detection algorithms are less complex and well understood but their BER performance is limited. ML detectors achieve the optimum result but have exponential computational complexity. Hence, iterative tree-search algorithms like the sphere decoder or the K-Best detector, which reduce the computational complexity, has become a major topic in research. In this paper a modified K+-Best detector is introduced which is able to achieve the BER performance of a common K-Best detector with K=12, by using a sorting algorithm for K=8. This novel sorting approach based on Batchers Odd-Even Mergesort is less complex compared to other parallel sorting designs and saves valuable hardware resources. Due to an efficient implementation the throughput of the detector is about 455 Mbit/s which is twice as high as the LTE peak data rate of 217.6 Mbit/s for a 16-QAM modulated signal. In this paper the architecture and the implementation issues are demonstrated in detail and the BER performance of the K+-Best FPGA implementation is shown.

Iterative tree search algorithms like K-Best or sphere decoder algorithms are promising candidates for the upcoming wireless communications systems. In this paper a square root and division free Givens rotation (SDFG) algorithm is merged into a common sphere decoder algorithm to decrease the entire complexity. Furthermore, the algorithm is speeded up due to parallelizing the computation by taking the orthogonality of the real and imaginary parts of the complex transmit symbols into account.

Synchronization is a major topic in OFDM. Small remaining timing offsets, which are less than the cyclic prefix, are commonly compensated by the equalizer in the receiver. Therefore, separate detection and compensation of the timing offset, especially the fractional timing offset is not mandatory. Considering a reciprocal communication system, i.e., the uplink channel is assumed to be equal to the transposed downlink channel, for example, downlink precoding can be done by using the estimated uplink channel matrix. In this case a small remaining timing offset, effecting the transfer matrix, corrupts the assumption of reciprocity, and this can cause degradations in the BER. In this paper we consider this effect and show how it can be compensated within the transfer matrix. Furthermore, we analyze in which way the effect differs for different systems mainly caused by the D/A-converter and interpolation filter.

Owing to the health hazard of respirable airborne fibers, there is great interest in detectors able to monitor fibers online. This paper features such an optical fiber detector which is based on Fraunhofer theory for the estimation of fiber size. Because Fraunhofer theory is not an exact theory and does not take into account the three-dimensional shape of fibers and their material properties, comparative computations with an exact theory, the multiple multipole method (MMP), a variant of the generalized multipole technique, were performed. For small fiber diameters these simulations showed differences between diffraction patterns calculated via Fraunhofer theory and scattering patterns computed with MMR The differences were strongly dependent on the optical properties of the fiber material.