Cleaning process occupies more than 35 % of semiconductor fabrication and handles the reliability of products and device yield which is becoming more important in semiconductor fabrication. In spite of its high efficiency, RCA cleaning wastes a huge amount of chemical and water, and exerts the negative effect on the environment. The physical cleaning becomes a key technology with super diluted chemistry in lower temperature for green nanotechnology. This paper deals with an optimization of PVA brush scrubbing which is the most popular physical cleaning method for defect-free surface in Post-CMP cleaning. The particle adhesion force depending on the interfacial reaction was analyzed by the developed friction force monitoring system, real contact area system and AFM scratch test. The experimental result showed that the increase of friction force according to brush pressure leads to decrease of contamination and increase of total scratches. The particle removal force depending on the interfacial reaction was analyzed by detected friction force and the surface defects were verified by AFM and FE-SEM. Therefore, this paper suggests the optimization of PVA brush cleaning condition associated with cleaning efficiency and surface defect for green manufacturing.

The main aim of paper is to find adhesion force of particles to increase particle removal efficiency for defect-free surface by using CMP and post-CMP cleaning. The adhesion force consists of physical interaction such as van der Waals, electrostatic and capillary forces, and of chemical bonding such as hydrogen bonding. Using an atomic force microscope (AFM), removal forces between particles and various substrates were measured as a function of aging time and relative humidity. The experimental results showed that the particle removal force increased gradually from 50nN to 300nN as the aging time. This is the reason why adhesion force and contact area between particles and wafer surface increase by deformation of particles. The removal force is can be evaluated by calculating with consideration for AFM tip and cantilever shape. In addition, Cu surface and colloidal silica particles in the slurry had higher adhesion force than Si surface and abrasive particles. The result showed that relative humidity had an effect on particle adhesion force by F-D curve mode of AFM. Therefore, the AFM friction force analysis would be helpful to investigate the physical cleaning process without surface damage such as remained particle, scratch and collapse of pattern. Keywords: Adhesion force, Chemical mechanical polishing (CMP), Post-CMP cleaning, Atomic force microscope (AFM), Particle removal

Copper (Cu) had been attractive material due to its superior properties comparing to other metals such as aluminum or tungsten and considered as the best metal which can replace them as an interconnect metal in integrated circuits. CMP (Chemical Mechanical Polishing) technology enabled the production of excellent local and global planarization of microelectronic materials, which allow high resolution of photolithography process. Cu CMP is a complex removal process performed by chemical reaction and mechanical abrasion, which can make defects of its own such as a scratch, particle and dishing. The abrasive particles remain on the Cu surface, and become contaminations to make device yield and performance deteriorate. To remove the particle, buffing cleaning method used in post-CMP cleaning and buffing is the one of the most effective physical cleaning process. AE(Acoustic Emission) sensor was used to detect dynamic friction during the buffing process. When polishing is started, the sensor starts to be loaded and produces an electrical charge that is directly proportional to the applied force. Cleaning efficiency of Cu surface were measured by FE-SEM and AFM during the buffing process. The experimental result showed that particles removed with buffing process, it is possible to detect the particle removal efficiency through obtained signal by the AE sensor.

The polycrystalline silicon Chemical Mechanical Polishing process is performed by using a hybrid chemical reaction and mechanical abrasion. A native oxide on the polysilicon surface was found to have affected the CMP results. This paper describes the effect of the native oxide on polysilicon CMP and the variation in the polishing characteristics with the concentration of the alkaline agent (potassium hydroxide, KOH). During CMP, the high-frequency friction force was simultaneously measured by using a CMP monitoring system to understand the polysilicon CMP characteristics. The result showed that the removal rate of polysilicon increased with the alkaline agent concentration. However, the analyzed data from the CMP monitoring system showed that the initial friction signal had transition region during polysilicon polishing, resulting from the native oxide. To remove the native oxide on polysilicon, the authors performed a BOE (buffered oxide etch) treatment. After the native oxide on Polysilicon had been removed, the transition region was no longer found and higher material removal could be achieved. Consequently, we found that the removal of polysilicon was restricted by the native oxide, which was influenced by the alkaline agent.

The planarization CMP, which is considered as one of the most important ULSI chip, is introduced to make flat surface in patterned areas for multilevel MEMS devices. However, the conventional CMP is limited in its application to MEMS structures, due to their wide patterns of μm to mm order thick film layer of several μm. A new CMP process has been developed for application to MEMS structures by the control of selectivity between polysilicon and silicon oxide. A 30nm thick protective oxide layer is deposited to protect the recessed areas, and then polished with low selectivity slurry to partially remove the protruded area while suppressing the removal rate of the recessed area. During the second step of the new CMP process, high selectivity slurry is used to minimize the dishing amount and the variation in the step height according to pattern size and density. Experimental results showed that dishing amount was less than 30nm at the largest pattern of 1250 μm in width and showed no variation of entire pattern, which meant local and global planarization. This result suggests that the newly developed selectivity controlled CMP process can be successfully applied for fabrication the multilevel MEMS devices.

The aim of this paper is to develop the planarization process to make flat surface in patterned areas for multilevel MEMS devices using CMP process. With creating planar surface in each layer, the accuracy and flexibility of following steps such as lithography, etching and/or deposition process can be drastically enhanced. For this purpose, the two step CMP process has been developed. The 30nm thick protective oxide layer was deposited to protect recessed areas. The wafer with protective layer is then polished with low selectivity slurry to partially remove protruded area while suppressing the removal rate of the recessed area. After the first step CMP process, high selectivity slurry was used to minimize the dishing amount and variation in pattern structures. Experimental results show that the dishing amount was less than 30nm at the largest pattern of 1250um wide and had no variation in whole patterns, which means local and global planarization. This result suggests that the developed two step CMP process can be successfully applicable to fabricate the multilevel MEMS device.