Most existing target sensing approaches in integrated sensing and communication (ISAC) systems assume a regular time-frequency resource allocation. However, in practical ISAC systems, resources are often allocated irregularly because of the randomness of user scheduling. This paper addresses such resource-irregular scenarios by integrating the CANDECOMP/PARAFAC decomposition (CPD) framework with tensor completion. The proposed structured tensor completion and decomposition (STCD) method enhances target sensing by not only processing echo signals from irregularly allocated resource regions but also interpolating those from unallocated ones. Moreover, tensor completion reconstructs the Vandermonde structure of steering matrices. By enforcing a tensor rank-1 constraint, the STCD method leverages the Vandermonde structure to establish more relaxed uniqueness conditions for CPD compared with existing approaches. Additionally, we present the Cram & eacute;r-Rao bound results for STCD in angle-range-velocity estimation, extending prior analyses from resource-regular to resource-irregular scenarios. Simulation results validate the effectiveness of the proposed STCD method for resource-irregular target sensing, demonstrating improved performance over traditional methods and its unstructured counterpart.

Radio map (RM) reconstruction is essential for environment-aware wireless networks, but practical measurements are often collected along mobility trajectories rather than randomly scattered over the target region. Such trajectory-sampled observations induce spatially heterogeneous uncertainty: near-trajectory regions are directly constrained, whereas distant or occluded regions remain weakly observed, leading to degraded reconstruction accuracy in under-constrained areas. To address this problem, we propose Trajectory-Guided Plug-and-Play Priors (TGPP), a general guidance module for sparse RM reconstruction. TGPP learns an explicit guidance map as an interpretable input-space risk prior, and an implicit guide feature that is projected and fused with backbone hidden representations. TGPP can be attached to different reconstruction backbones without changing their original task formulation. We further introduce RadioFlow-LDM, a latent flow-based generative backbone, and apply TGPP to deterministic, adversarial, graph-based, and latent generative reconstruction models. Experiments on RadioMapSeer with five trajectory sampling rates show that trajectory-sampled reconstruction differs substantially from random sparse interpolation. TGPP improves most reconstruction metrics across backbones, achieving up to 43.1% NMSE reduction relative to the corresponding base backbone without trajectory-guided priors.

As attention mechanisms find increasing application in computer vision, numerous neural networks are now integrating convolutional neural networks (CNNs) with attention layers to enhance performance. As a typical representative, the Bottleneck Transformer (BoT) network effectively balances the extraction of local features and modeling of global context, leading to significant performance improvements. However, the multihead self-attention (MHSA) layer of BoT deviates from conventional MHSA by incorporating a wider range of matrix operations, posing challenges in computational complexity and memory bandwidth. This letter introduces a customized accelerator for the MHSA layer of BoT. The accelerator employs a configurable systolic array architecture, designed to support various matrix operations, including matrix transposition, addition, multiplication, and a hardware-optimized Softmax, facilitating hybrid scalable MHSA layers. Implemented on an FPGA, the proposed accelerator achieves a performance of 143.98 GOPS at a frequency of 320 MHz. When compared to CPU implementations, our design offers a 7.18 & times; reduction in inference time.

Wireless communication systems demand increasingly agile and high-performance platforms to meet evolving protocol and deployment requirements. However, existing platforms often face tradeoffs between software (SW) flexibility for algorithm exploration and hardware (HW) efficiency for link-level evaluation. This brief presents Venusian, an agile HW/SW co-design testbed that bridges this gap for wireless baseband processing. Venusian features a lightweight Python-to-HW compilation framework that supports code reuse across simulation and deployment. On the HW side, it integrates a digital front-end (DFE) for real-time signal acquisition and a customized RISC-V-based vector processing unit (VPU) for accelerating rule-based baseband processing. The architecture is deployed on an evaluation board and validated under a 5-G new radio (NR) broadcast channel (BCH) decoding task. Experimental results demonstrate that Venusian achieves speedups of at least 3.61 & times; and 51.57 & times; over Intel and Arm platforms, respectively.

We present Ishtar, a power-efficient RISC-V baseband system-on-chip (SoC) tailored for multi-standard integrated sensing and communications (ISAC) in low-altitude wireless networks (LAWNs). Ishtar integrates a hierarchical scheduling scheme and a system-level power-gating architecture that dynamically controls power domains to balance performance and energy efficiency. It supports dynamic task scheduling across heterogeneous protocols using a domain-specific, graph-based representation. Implemented in 40 nm technology and running at 300 MHz, Ishtar achieves better normalized efficiency than state-of-the-art SDR SoCs, delivering real-time multi-standard sniffing under stringent power and area constraints.

Convolutional neural networks (CNNs) have demonstrated significant achievements in the field of computer vision, yet their high computational demands restrict practical applications. Current pruning methods seek to mitigate this issue, which however often rely on heuristic manual approaches, encountering challenges in maintaining both significant model compression and accuracy. To address the above issues, a fast neural architecture search pruning (FNP) technique is proposed in this paper. Firstly, an importance matrix (IM) based preprocessing stage efficiently removes redundant structures by considering both weight importance and computational complexity, providing a compact baseline for subsequent pruning. Secondly, we adapt fast genetic algorithms (FGA) to identify optimally pruned model configurations. Furthermore, to accelerate the search process, we utilize a zero-shot learning approach to estimate model performance with the score of the frame (SoF), which is a gradient-based score. Compared with state-of-the-art (SOTA) pruning techniques, FNP demonstrates superior performance in terms of search duration and compression ratio. On the CIFAR-10 dataset, our method removes 95.24 % of the parameters in VGG-16 while achieving a 0.72 % accuracy improvement compared with the baseline. On the ImageNet dataset, we prune 68.98 % of the parameters in ResNet-50 and obtain a 1.2 % accuracy improvement compared with state-of-the-art (SOTA) approaches, while reducing the search time by 98.94 %. The code is available at https://github.com/aqiu1222/FNP.git

As Global Navigation Satellite System (GNSS) advances toward multi-system and multi-frequency operation, modern receivers require greater flexibility and scalability. The Venus architecture, built on RISC-V instruction extensions, effectively meets these demands. This live demonstration presents a software-defined receiver based on the Venus architecture. Implemented in a domain-specific language, the GNSS receiver uses vectorized parallelism to accelerate preprocessing, correlation/integration, and FFT, achieving real-time performance. In addition, acquisition and tracking are optimized for the Venus architecture, improving overall efficiency. The demonstration visualizes the GNSS receiver outputs and real-time positioning results.

This paper proposes a novel blended hyper-cellular architecture for low-altitude aerial intelligent networks (LAINs) to provide agile coverage tailored to active air routes and takeoff/landing spots. Traditional cellular networks struggle to meet the dynamic demands of low-altitude UAV communications due to their rigid structures. The hyper-cellular network (HCN) architecture separates control and traffic coverage, enabling flexible and energy-efficient operations. The key components include control base stations (CBSs) for wide-area signaling coverage and traffic base stations (TBSs) that can be dynamically activated based on traffic demands. The proposed solution also integrates space information networks (SINs) to enhance the coverage efficiency. Key technologies such as all-G CBS using RISC-V architecture, AI-powered radio maps for low-altitude environments, and agile TBS coverage adaptation are introduced with some preliminary studies. These designs aim to address challenges like mobility management, interference coordination, and the need for real-time spectrum sharing in blended satellite-terrestrial networks. The proposed solution offers a scalable and agile framework to support the rapidly growing demand for reliable, low-latency, and high-capacity UAV communications in urban environments.

As heterogeneous many-core systems gain prominence in embedded domains, efficient scheduling mechanisms become increasingly vital. Existing solutions often suffer from trade-offs between real-time responsiveness, parallelism, and programmability. We propose a hybrid hardware-software scheduling framework for heterogeneous many-core systems, which ensures the software algorithm’s scheduling results while dynamically adjusting task execution at runtime based on hardware status. Task dependencies are analyzed offline using a domain-specific language (DSL) to generate optimized schedules. At runtime, a hardware scheduler performs fast dependency checks and task dispatching. Experimental results show efficient parallel scheduling with minimal overhead, positioning the framework as a practical solution for latency-sensitive applications such as wireless baseband processing.

Implementing LiDAR-based 3D object detection algorithms in practical autonomous driving situations presents a significant challenge. In current research algorithms, the inherent sparsity and randomness of point cloud data necessitate significant memory usage and frequent data read/write operations during preprocessing. Such demands are not well-suited for terminal devices with stringent real-time requirements and constrained resources. In this paper, we present a packetized processing Pillar Feature Net accelerator for LiDAR 3D object detection. By integrating voxelization and feature extraction into a pipelined architecture, the proposed accelerator significantly reduces the storage requirements for point cloud data and enhances the speed of feature extraction and pseudo-image generation. Experimental results indicate that the proposed method improves the computational throughput from point cloud data to pseudo-image generation by 1.2 times and eliminates the need for off-chip memory access during preprocessing.

Gaining accurate channel state information (CSI) through a low-cost scheme has always been difficult in wireless communication systems. One of the current research directions is to obtain the CSI from the channel knowledge map (CKM) based on the users’ location. However, the direct utilization of CSI in CKM is hindered due to the sensitivity of instantaneous CSI to time-varying scattering environments and positioning errors. To address this issue, this paper proposes a channel prediction scheme that combines the CKM with historical user CSI to enhance the beamforming performance in multiple-input multiple-output (MIMO) systems. Specifically, the joint-orthogonal matching pursuit algorithm is used to accurately reconstruct the user channel with high precision using a limited number of pilots, and the multi-path components tracking algorithm is employed to extract the common and independent support sets of paths from the estimated channel and the CKM. Lastly, an adaptive and low-complexity predictor is utilized to obtain the future user CSI. The proposed scheme has been evaluated using multiple measured channel datasets, the results indicate a significant improvement in predicting channel cosine similarity compared to directly using the CSI from CKM and existing schemes.

Autonomous driving technologies are swiftly evolving, characterized by two main strategies: 1) single-vehicle autonomous driving (SVAD) and 2) vehicle-infrastructure cooperative autonomous driving (VICAD). SVAD depends entirely on the vehicle's internal sensors and processing capabilities, whereas VICAD benefits from a synergistic network combining roadside infrastructure, connected vehicles, and cloud services to boost safety and efficiency. Nevertheless, VICAD encounters challenges with high-bandwidth data transmission and perception latency. To mitigate these concerns, we introduce an innovative intelligent roadside unit (I-RSU) platform integrating perception, computing, and communication into one cohesive system. The platform features dual neural processing units (NPUs) for the effective extraction of images and LiDAR features, alongside a Cellular-V2X (C-V2X) communication module, all realized on a field-programmable gate array (FPGA). This setup minimizes latency and expenses by enabling computation near the sensors and facilitating selective data transmission. Our system also supports multimodal fusion, enhancing overall perception and safety. Through extensive real-world trials and simulations, our system demonstrates a substantial reduction in end-to-end latency, providing a scalable solution for VICAD scenarios.

6G mobile networks currently face the critical challenge of minimizing energy consumption in network operations. To tackle this, the hypercellular network model, or fully decoupled radio access networks, has been proposed. In these networks, control base stations (BSs) use low-frequency bands, while data BSs rely on high-frequency bands. A comprehensive analysis of spatial-time domain characteristics and interactions between these bands is essential for effective implementation. This letter presents data from channel measurements obtained during urban micro-cell field studies, which involve simultaneous, colocated measurements at 4 GHz, 6.8 GHz, 13 GHz, and 28 GHz using a channel sounder with a 400 MHz bandwidth and multiantenna active arrays. The extracted spatial-time domain characteristics include power delay profiles, pathloss, delay spread, and angular spectrum, alongside an assessment of spatial and frequency consistency. These results aim to guide the future deployment of decoupled 6G networks.

Wireless baseband processing (WBP) is a key element of wireless communications, with a series of signal processing modules to improve data throughput and counter channel fading. Conventional hardware solutions, such as digital signal processors (DSPs) and more recently, graphic processing units (GPUs), provide various degrees of parallelism, yet they both fail to take into account the cyclical and consecutive character of WBP. Furthermore, the large amount of data in WBPs cannot be processed quickly in symmetric multiprocessors (SMPs) due to the unpredictability of memory latency. To address this issue, we propose a hierarchical dataflow-driven architecture to accelerate WBP. A pack-and-ship approach is presented under a non-uniform memory access (NUMA) architecture to allow the subordinate tiles to operate in a bundled access and execute manner. We also propose a multi-level dataflow model and the related scheduling scheme to manage and allocate the heterogeneous hardware resources. Experiment results demonstrate that our prototype achieves 2× and 2.3× speedup in terms of normalized throughput and single-tile clock cycles compared with GPU and DSP counterparts in several critical WBP benchmarks. Additionally, a link-level throughput of 288 Mbps can be achieved with a 45-core configuration.

Wireless baseband processing (WBP) serves as an ideal scenario for utilizing vector processing, which excels in managing data-parallel operations due to its parallel structure. However, conventional vector architectures face certain constraints such as limited vector register sizes, reliance on power-of-two vector length (VL) multipliers, and vector permutation capabilities tied to specific architectures. To address these challenges, we have introduced an instruction set extension (ISE) based on RISC-V known as unlimited vector processing (UVP). This extension enhances both the flexibility and efficiency of vector computations. UVP employs a novel programming model that supports non-power-of-two register groupings (RGs) and hardware strip mining, thus enabling smooth handling of vectors of varying lengths while reducing the software strip-mining burden. Vector instructions are categorized into symmetric and asymmetric classes, complemented by specialized load/store strategies to optimize execution. Moreover, we present a hardware implementation of UVP featuring sophisticated hazard detection mechanisms, optimized pipelines for symmetric tasks such as fixed-point multiplication and division, and a robust permutation engine for effective asymmetric operations. Comprehensive evaluations demonstrate that UVP significantly enhances performance, achieving up to 3.0x and 2.1x speedups in matrix multiplication and fast Fourier transform (FFT) tasks, respectively, when measured against lane-based vector architectures. Our synthesized register transfer level (RTL) for a 16-lane configuration using SMIC 40-nm technology spans 0.94 mm(2) and achieves an area efficiency of 21.2 GOPS/mm(2).

Accurate reconstruction of 3D radio map is critical for fifth-generation network deployment in low-altitude scenarios where traditional 2D methods are insufficient to model complex urban propagation effects due to environmental heterogeneity and vertical dependencies. This paper proposes a novel neural network architecture that integrates multi-modal environmental data with sparse measurements for high-fidelity 3D radio map reconstruction. Our framework introduces a sparse converter transforming irregular measurements into structured grid representations with confidence-aware weighting, a multi-scale feature pyramid extracting hierarchical environmental features from building layouts and a layer-wise reconstructor incorporating attention mechanisms and inter-layer communication for height-adaptive prediction. Evaluated on 8,000 ray-traced urban scenarios across 12 height layers, the method achieves 0.014 Mean Square Error (MSE) and 0.956 correlation, achieving a 54.8% MSE reduction and 96.6% coverage quality improvement compared to traditional Kriging methods.

Vector instruction set architectures (ISAs) play a critical role in accelerating data-parallel computation, yet mainstream designs—such as the RISC-V “V” Vector Extension (RVV) – still rely on rigid, power-of-two register grouping strategies. These limitations hinder performance when handling ultra-long vectors or non-uniform workloads, as they require extensive strip-mining and careful low-level tuning to maintain efficiency. To overcome these bottlenecks, we propose Zoozve, a flexible, strip-mining-free extension to the RISC-V vector ISA. Zoozve introduces an arbitrary register grouping mechanism that enables more precise register utilization and eliminates the need for data slicing across multiple loop iterations. This work presents a full-stack realization of Zoozve, including (1) a hardware-compatible ISA with support for flexible vector lengths and asymmetric instructions, (2) a compiler backend based on LLVM that performs intrinsic splitting, register allocation with live-interval modification, and instruction coalescing, and (3) a hardware proof-of-concept implementation that integrates hazard detection and a register-level element exchange engine. Experimental evaluation using instruction-level simulation shows that Zoozve achieves up to 344.44× speedup in fast Fourier transform (FFT), 76× in dot product, 58.92× in axpy, and 20.41× in 2D convolution compared to RVV, primarily by eliminating strip-mining and improving register reuse. Register transfer level (RTL) synthesis in a 40 nm process shows that Zoozve’s additional hardware logic incurs only 9% area overhead, confirming its feasibility for real-world deployment. Together, these results demonstrate Zoozve’s potential as a scalable and efficient vector processing solution for high-performance computing, machine learning, and signal processing.

Convolutional neural networks (CNNs) are widely used in computer vision and other fields, while their model parameters and intermediate feature map sizes continue to grow significantly. When deployed on resource-constrained embedded platforms, the frequent data movement of feature maps causes substantial energy consumption and memory bandwidth pressure that demands urgent solutions. To address this challenge, this paper proposes a lightweight feature compression scheme that effectively compresses feature maps through dynamic uniform quantization combined with exponential-Golomb entropy coding. The corresponding hardware architecture is introduced for this scheme, which further improves its hardware efficiency through techniques such as partial comparison, division lookup tables, and multi-way parallelism. On 8/16-bit quantized models, our solution achieves a compression ratio of 2.76×~ 4.64×, outperforming existing approaches.

Future 6G local area networks (LANs) are expected to inherently feature edge artificial intelligence (AI) capabilities, despite constraints on power consumption and device dimensions. Additionally, the 6G architecture has integrated various AI-based algorithms into wireless baseband signal processing. These developments suggest a move towards a unified AI and wireless baseband architecture in 6G LANs. This article presents a framework from a computing architecture viewpoint, dubbed Venus, which is an integrated AI and wireless baseband domain-specific architecture based on RISC-V instruction extensions. Venus is conceived using a multi-level dataflow-driven approach and executed on a manycore architecture that features non-uniform memory access (NUMA). When compared to prevailing architectures, such as general-purpose processors (GPPs) with specialized accelerators, digital signal processors (DSPs), graphic processing units (GPUs), and field-programmable gate arrays (FPGAs), Venus strikes the optimal balance between programmability and efficiency. This is achieved through a tailored instruction extension for both AI and wireless signal processing, alongside an advanced dataflow-driven, highly parallel manycore architecture. Moreover, it benefits from the open RISC-V ecosystem, enabling scalability for future AI and wireless innovations.

Roadside bird’s eye view (BEV) perception can enhance the comprehensive environmental awareness required for autonomous driving systems. Current approaches typically concentrate on BEV perception from the perspective of the vehicle, requiring precise camera calibration or depth estimation, leading to potential inaccuracies. We introduce a calibration-free roadside BEV perception architecture, which utilizes elevated roadside cameras in conjunction with the vehicle position transmitted via cellular vehicle-to-everything (C-V2X) independently of camera calibration parameters. To enhance robustness against practical issues such as V2X communication delay, packet loss, and positioning noise, we simulate real-world uncertainties by injecting random noise into the coordinate input and varying the proportion of vehicles providing location data. Experiments on the DAIR-V2X dataset demonstrate that the architecture achieves superior performance compared to calibration-based and calibration-free baselines, highlighting its effectiveness in roadside BEV perception.