基本信息
浏览量:0
职业迁徙
个人简介
Bhushan Talele (Member, IEEE) received the M.S. and Ph.D. degrees in electrical engineering from Arizona State University, Tempe, AZ, USA, in 2017 and 2021, respectively. From 2013 to 2015, he was an Analog Circuit Designer at Cadence Design Systems, Bengaluru, India, where he was involved in designing receiver-side blocks for SerDes IP. He was a Design Intern at Kilby Labs, Texas Instruments, in 2019 and 2018, respectively, and Qualcomm, San Diego, CA, USA, in 2017, where he was involved in designing voltage references and class-D audio amplifiers and haptic drivers, respectively. Since 2022, he has been with the Power Management IC Design Group, Qualcomm. His current research interests include low-power analog design and reliability for power management IC design.
研究兴趣
论文共 4 篇作者统计合作学者相似作者
按年份排序按引用量排序主题筛选期刊级别筛选合作者筛选合作机构筛选
时间
引用量
主题
期刊级别
合作者
合作机构
Shashank Alevoor,Rakshit Dambe Nayak,Bhushan Talele,Abhishek Ray, Joseph D. Rutkowski, Troy Stockstad,Bertan Bakkaloglu
IEEE Transactions on Circuits and Systems I: Regular Papersno. 3 (2023): 1097-1109
2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC)pp.494-+, (2020)
引用3浏览0引用
3
0
作者统计
合作学者
合作机构
D-Core
- 合作者
- 学生
- 导师
数据免责声明
页面数据均来自互联网公开来源、合作出版商和通过AI技术自动分析结果,我们不对页面数据的有效性、准确性、正确性、可靠性、完整性和及时性做出任何承诺和保证。若有疑问,可以通过电子邮件方式联系我们:report@aminer.cn