Overall operation considerations for a SONOS-based memory

C H Lee,W H Tu, L H Chong,S H Gu,Y J Chen, J Y Hsieh, I J Huang,N K Zous,T T Han,M S Chen, W P Lu, K C Chen,Tahui Wang,C Y Lu

Hsinchu(2009)

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摘要
Erase characteristics of a SONOS-based structure are emulated not only for n+-poly and p+-poly gates but also for TaN-gate+Al2O3 combination. By incorporating our previous studies, performances including program, erase, and read disturb can be reviewed for both SONOS and TANOS devices. Unsurprisingly, it is hard to satisfy all requirements by using a SONOS device. In a TANOS device, an optimal bottom oxide thickness can be specified with the consideration of the three factors simultaneously. Moreover, it is found that conventional extrapolation methodology is inadequate to predict the lifetime of a TANOS device and tends to under-estimate the tolerable read bias.
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关键词
extrapolation,semiconductor storage,semiconductor-insulator-semiconductor devices,sonos-based memory,tanos devices,bottom oxide thickness,extrapolation methodology,n+-poly gates,p+-poly gates,tolerable read bias,industrial electronics,satisfiability,tunneling,logic gates,materials,electrons,electronics industry
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