Three chips stacking with low volume solder using single re-flow process

Electronic Components and Technology Conference(2010)

引用 14|浏览7
暂无评分
摘要
Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications. Chip-to-chip stacking for 3D packaging using conventional assembly method and single step reflow attachment is the most cost-effective. But fine pitch microjoints of stacked chip by single re-flow attachment is challenging due to chip movement during stacking processes, which lead to poor assembly yields. This paper reports a method of stacking chips by thermal tacking and permanent joints are formed simultaneously by single re-flow step. Three chips of 12mm × 12mm size with micro bumps at 100um pitch have been assembled using this approach. Low volume of lead free solder (Sn) has been chosen for the micro-bump interconnections between the chips. The thermal tacking conditions and flip-chip assembly process have been studied in details. The micro-joints quality and reliability have been assessed and reported.
更多
查看译文
关键词
reliability,testing,throughput,assembly,chip,high frequency,copper,chip scale packaging,microelectronics,stress,tin,stacking,flip chip,frequency,cost effectiveness,packaging,lead
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要