Lateral GaN JFET Devices on Large Area Engineered Substrates

ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY(2019)

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摘要
Lateral GaN-based p-n junction gated field effect transistor (LJFET) power transistors on large area substrates were fabricated as a proof-of-concept to evaluate candidate power switching devices that could be designed with avalanche breakdown capability. The devices performed to design specifications aimed at demonstrating a device suitable for operation in cascode with a normally-off low-voltage Si based transistor companion. The maximum current density was 200 mA/mm and threshold voltage was -30V. Large gate width devices (40mm) exhibited >1A current. The devices have blocking capability to 800V. Initial testing of the switching dynamics indicates low dynamic RON even with an un-optimized buffer. (c) 2019 The Electrochemical Society.
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