Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits

2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)(2021)

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摘要
The common-centroid (CC) layout style is widely used to minimize the impact of variations among matched devices in analog blocks such as current mirror banks and differential pairs. This paper presents a constructive, performance-aware CC placement and routing algorithm for transistor arrays. Specifically, the proposed approach maximizes diffusion sharing, incorporates length of diffusion (LOD) ba...
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关键词
Performance evaluation,Degradation,Current mirrors,Systematics,Layout,Integrated circuit interconnections,Analog circuits
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