High Throughput of Image Processing with Keccak Algorithm using Microprocessor on FPGA

2022 7th South-East Europe Design Automation, Computer Engineering, Computer Networks and Social Media Conference (SEEDA-CECNSM)(2022)

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摘要
Transmitting images between people has been a crucial aspect of daily communication in our digital world. Therefore, methods are needed to check the integrity and accuracy of the transmitted data. The most famous and secure way today is hashing. This paper focuses on the Keccak algorithm for hashing image sizes $256\times 256$ pixels utilizing our specialized FPGA implementations. Our experiments were performed on the FPGA Intel DE2-115 (EP4CE115F29C7) and the Nios II microprocessor. Additionally, research on computational metrics like throughput, entropy, NPCR, and UACI demonstrates how the Keccak algorithm is specialized, secure, and has a wide range of potential applications for hashing images. Finally, we propped our method using the Block Floating Point Hardware 2 (FP2). We contrasted the outcomes of our analysis with other recent optimization techniques used by other researchers, and the results demonstrate our advantages.
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关键词
Keccak hash function,SHA-3,Cryptography,Pipeline,NIOS II microprocessor,FPGA,Floating point
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