Acropolis Institute of Technology and Research (AITR) is a private engineering college located in Indore, Madhya Pradesh, India. It was established in 2005.Acropolis Institute of Technology and Research - AITR offers bachelor's and master's degrees in engineering and master's degrees in computing and management. It also provides online courses facilities to its student's.The college is affiliated to Rajiv Gandhi Proudyogiki Vishwavidyalaya (RGPV) for BTech, BE, Diploma, ME, B Pharm and M Pharm courses and Devi Ahilya Vishwavidyalaya (DAVV) for Master of Computer Application (MCA), BCA, BBA, BCom, BSc, BA and Master of Business Administration (MBA) courses.
Nowadays, skin cancer is one of the most common cancers, and early diagnosis has a significant influence on improving the outcome of the patient. In this paper, a novel hybrid Deep Learning (DL) based approach is presented for the classification of skin lesions where both Convolutional Neural Networks (CNNs) as well as architectures-based on Transformer are implemented together. As such, the primary goal of the proposed model would be to enhance both the effectiveness and efficiency of the diagnosis of skin lesions by focusing on spatial as well as contextual features of the images. The CNN layer extracts rich features from the input images of skin lesions, while the Transformer layer captures the longer dependencies and contextual information within the images, which consequently allows for better distinguishing between benign and malignant lesions. Moreover, the model is further enhanced with clinical metadata pertinent to patient information to increase the accuracy of the diagnostic process. To examine the efficacy of the proposed approach, an extensive experiment was conducted using a publicly available skin lesion dataset (HAM10000-2018, ISIC-2019, and DermNet-2019); further comparisons were done with traditional CNN-based classifiers. The results attained by hybrid model overperform traditional classification performance in terms of diagnosis and efficiency. Advancement in the automation of medical image analysis provides us with benefits and strengths of using both CNNs and Transformers in the classification of skin lesions.
This study demonstrates a large-area, high-performance RF T-gate GaN HEMT fabricated using an 8-inch CMOS back-end-of-line (BEOL)-compatible process. This compatibility enables the efficient integration of GaN-based RF components with CMOS circuits, thereby enhancing overall functionality for next-generation applications in advanced electronics and packaging. To improve the DC and RF performance of the RF device, supercritical fluid nitrogen (SCFN) treatment was applied and optimized at 250 degrees C for 30 min, effectively reducing trap states on both the AlGaN surface and the AlGaN/GaN interface. Under the optimized condition, the SCFN-treated device exhibited a 21 % increase in maximum drain current (IDSon,max) by 21 %, a 13 % increase in maximum transconductance (gm,max), a 59 % reduction in subthreshold swing (SS), and a 40 % reduction in on-resistance (Ron). The device also achieved a notably low drain-induced barrier lowering (DIBL) of 92 mV/V, compared with 175 mV/V for the untreated device. Furthermore, RF performance was substantially improved, with the SCFN-treated device achieving fT/fmax values of 60/101 GHz-outperforming the 49/72 GHz in untreated devices, at a T-gate length of 0.18 mu m. To further clarify these enhancements, a TCAD simulation was conducted to analyze electron trapping in the drift region (gate-drain access region) and its impact on band bending and partial depletion of the two-dimensional electron gas (2DEG). These results provide a comprehensive understanding of the mechanisms driving the observed performance improvement.
Phase Frequency Detectors (PFDs) are a key part of an all-digital phase-locked loop (ADPLL). Their main role is to compare the timing of two clocks, and this directly affects how quickly the system locks, how stable it is, and how much timing variation it produces. In this work, two digital PFD designs were created and tested using a 180 nm CMOS technology. The first design is a standard and widely used PFD built using two D-type flip-flops and simple reset logic. It can correctly detect both phase and frequency differences between the reference clock and the feedback clock, and it avoids common issues such as dead zones.The second design is an improved version that includes a digital pulse amplifier. This addition strengthens the phase error signal, which helps the loop detect small timing differences more clearly, especially during the locking phase. Both PFDs were designed at the transistor level and verified using Cadence Virtuoso through schematic design, layout, and time-domain simulations. The simulation results show that both designs generate correct UP and DOWN signals under all phase and frequency conditions and operate reliably. On comparing, it came to that the conventional PFD consumes less power and occupies less area, making it suitable for low-power and robust ADPLL designs. The PFD with the pulse amplifier provides better timing accuracy and locks faster, but it requires slightly more power and area. This makes it a better choice for high-performance digital frequency synthesis applications where speed and precision are more important.
This research utilizes machine learning algorithms to categorize crime reports, aiming to identify the relevant sections of the Indian Penal Code (IPC) associated with reported crimes. They developed a comprehensive dictionary of words related to various crime categories and analyzed crime reports to compile relevant IPC sections and terminology. By employing machine learning techniques, they classified the dataset based on the presence of these terms in the reports, facilitating efficient and accurate classification of reported incidents according to legal standards. In this paper, different machine learning approaches are compared to predict the applicability of particular IPC sections to crime reports. The results of applying various machine-learning algorithms to our dataset have provided valuable insights into their performance. Among the algorithms tested, Naive Bayes and Support Vector Machine emerged as the top performers, both achieving an impressive accuracy score of 0.981481. This indicates their efficacy in classifying the data accurately. Right behind it, Random Forest and Logistic Regression demonstrated competitive performance with an accuracy score of 0.962963. K-Nearest Neighbors also demonstrated respectable accuracy at 0.944444. However, it is worth noting that the Decision Tree classifier lagged behind the others, registering the lowest accuracy of 0.888889.
The expansion of online payment methods has substantially accelerated worldwide e-commerce growth while presenting difficulties concerning cybersecurity, transaction efficiency, and user experience. Near-field communication (NFC) technology, recognized for its secure and flawless operation in physical retail, possesses unexploited potential for online payments. This study examines the viability of utilizing NFC for online transactions, proposing an innovative framework that incorporates NFC-enabled devices, payment gateways, and merchant platforms to mitigate the shortcomings of conventional payment methods, including susceptibility to phishing attacks, data breaches, and user inconvenience. The prototype system, evaluated across many scenarios, revealed that NFC-based payments decrease authentication time by 40
