In recent years, various design-time scheduling strategies have been proposed in the design of mixed-criticality systems to ensure the correct and timely execution of high-criticality tasks in emergency modes. However, the gap between typical runtime scenarios and worst-case provisions often leads to inefficient utilization of computational resources. To address this issue, this paper proposes an online low-criticality task degradation strategy based on probabilistic scheduling analysis to optimize task execution in mixed critical multiprocessor systems. This paper details how dynamic adjustments and task degradation during execution ensure the timely completion of high-criticality tasks while maximizing the execution of low-criticality tasks. Experimental results demonstrate that this approach significantly outperforms traditional deterministic scheduling methods in terms of resource utilization and system reliability by incorporating probabilistic scheduling analysis.
To solve the problems of low power transmission and energy conversion rate caused by insufficient resonant frequency tracking performance in the field of high-frequency ultrasonic system, a predictive control technology of ultrasonic system with low control operation amount and high resonant frequency tracking performance is studied to ensure the best sound power output of ultrasonic system in high-frequency rehabilitation treatment scenarios. A back-propagation neural network predictive control model is established with electrical and environmental parameters as input and ultrasonic driving signal frequency as output, together with the Improved Sparrow Search Algorithm(ISSA) is embedded in the system. A simulation of COMSOL and physical experiment platform is built to analyze and verify the control effect. The results show that the technology can efficiently predict the frequency of ultrasonic driving signal, so that the maximum error of output electrical power and sound power is 0.34% and 0.65%, respectively, and the average control time is 0.91s, which provides a feasible control method for high-frequency ultrasonic system in rehabilitation scenarios.
In autonomous driving (AD) systems, it is challenging for a functional module to properly fuse the data flows generated from multiple sensors in a real-time manner. Data fusion performs well when strictly complying with the data dependencies between modules, but meanwhile, the end-to-end latency of critical execution paths (from sensor to controller) may be worsened and become out of bounds. At the other extreme, simply minimizing the end-to-end latency may lead to insufficient data fusion. To tackle this challenging problem, this paper uses the directed acyclic graph (DAG) to model the AD system with multi-source data flows. We apply priority techniques to reduce the end-to-end latency of the critical execution paths and propose an integer linear programming (ILP) based method to derive a reasonable vertex priority assignment such that the end-to-end latency of each critical execution path satisfies its real-time constraint, and moreover, the execution order of vertices determined by vertex priorities keep consistent with data-dependency constraints with best efforts. Experimental work shows that our ILP method can solve the reasonable priority assignment problem for the DAG with hundreds of vertices in a few seconds.
The increasing complexity of functional operations, combined with the automotive industry's extensive collaboration with multiple vendors, presents significant challenges in man-aging software components within automotive systems. While AUTOSAR (AUTomotive Open System ARchitecture) aims to address these issues by enhancing software modularity and reusability, comprehensive studies on end-to-end latency, real-time capability, and timing analysis for safety-critical applications remain limited. This study proposes a chain-aware runnable scheduling framework to enhance real-time performance and reduce end-to-end latency in AUTOSAR-based automotive systems. Experimental results, incorporating priority assignment and runnable allocation, and a case study on real vehicle control units (VCU) of commercial vehicles, conducted using practical scenarios, indicate that the proposed framework reduces the end-to-end latency of the most safety-critical chain by 82% compared to the existing AUTOSAR schedulers.
This paper explores the integration of Time-Sensitive Networking (TSN) with 5G cellular networks to support high-bandwidth and low-latency end-to-end communication in networked embedded systems. Integrating TSN with 5G has the potential to support predictable and deterministic end-to-end communication, as well as to significantly enhance scalability, particularly in industrial automation, by providing flexibility, efficiency, and responsiveness. To ensure smooth integration while preserving TSN's Quality of Service (QoS) requirements, effective traffic translation and forwarding within the network are crucial. In this regard, this paper addresses key challenges related to traffic translation, QoS implementation, and latency in both TSN and private 5G networks on a realistic scenario. Through experiments, measurements, and evaluation, this paper thoroughly assesses latency and network capabilities in the integrated networks. Understanding these metrics is essential for devising effective integration strategies. Our findings indicate that it is possible to achieve latencies under 20 ms in an integrated TSN-5G network, given our specific configuration of a private 5G setup with a channel bandwidth of 40 MHz. We also identify an urgent need for the implementation of a proper QoS mechanism in the Open Air Interface software to enable the prioritization of high-critical data transmission.
With the rapid development of automotive intelligence and connectivity, the in-vehicle CAN networks system is vulnerable for the lack of encryption and authentication scheme. To prevent unauthorized access and secure the in-vehicle CAN network, only authorized ECUs (Electric Control Units) can communicate with each other. An ECU authentication method based on Physically Unclonable Functions (PUF) is presented. To ensure applicability in vehicle CAN networks with limited resources, a PUF circuit with lower resource consumption and reduced temperature sensitivity is designed. The output of the designed PUF circuit is unpredictable and unclonable, providing the ECU with unique identity information for authentication to the Domain Control Unit (DCU). The designed PUF circuit is implemented on a Field Programmable Gate Array (FPGA) platform and successfully integrated into a CAN network prototype system. Experimental results show that the proposed authentication method has good performance in terms of resource consumption and stability.
Defect detection models have been widely applied in industrial edge platform. However, in the field of aluminum material defect detection still have some challenges: (i) limited availability of aluminum material defect datasets and (ii) the high computational cost associated with large-scale models. To address these challenges, we propose a novel lightweight model for aluminum material defect detection. For the first challenge, we propose Positive Sample Augmentation(PSA) to effectively increase the number of samples. Additionally, we employ model pruning, knowledge distillation and model quantization to reduce inference latency and model size. We have successfully deployed this solution on real-world industrial platforms, double the running speed and reduce approximately 75% hardware costs, thereby validating the feasibility of our approach.
The cyber-physical system is converging with the IT system, and so is the mobility industry. Establishing a reliable distributed system, which involves offloading computing-intensive functions to the edge and/or cloud, is crucial for achieving a seam-less vehicle-edge-cloud continuum. Instead of merely providing supplementary assistance for vehicles, our focus is on building a reliable runtime environment at the edge to offload onboard functions of intelligent connected vehicles. We attempted to incor-porate virtualization for isolation and portability, orchestration for redundancy and scheduling, monitoring for failure detection, and service recovery. Through implementation and experiments in a real-world scenario involving multiple intersections within a city demo zone, we have identified the gap in meeting real-time, reliable, and safety-critical requirements using commercial off-the-shelf components. The challenges blocking the function offloading towards the off-board system are discussed.
Lane marker identification is crucial for developing Intelligent Transportation Systems and Autonomous Vehicles. While deep learning models excel in accuracy, their high computational requirements make them unsuitable for low-power edge devices. While various image-processing-based algorithms are used to pre-process images at different stages, there is a lack of an efficient algorithm specifically designed to enhance the lane-modeling stage. This paper proposes a two-stage preprocessing algorithm, consisting of a static phase and a dynamic phase, to implement a divide-and-conquer approach for enhancing existing lane-modeling algorithms. The static phase generates an initial pixel label map and seed locations, while the dynamic phase uses the pre-processed input image and seed locations to generate a dynamic pixel map for localizing lane marking zones. Focusing on the center two lanes, the proposed method improves overall accuracy and recall, which is critical for capturing smaller lane details. Experimental results demonstrate the superior performance of the proposed two-stage algorithm compared to traditional HT and PHT methods, with the two-stage algorithm outperforming the standard HT(0.88 vs 0.92) and PHT(0.89 vs 0.95) in terms of Average Accuracy and Recall. Additionally, the two-stage PHT method significantly reduces power consumption compared to the Ultra Fast Lane Detection (UFLD) model, making it ideal for low-power edge devices like the Raspberry Pi 4B and Jetson Nano.
With the ever-increasing complexity of real-time applications, heterogeneous architectures are often applied, with tasks modelled as a Direct Acyclic Graph (DAG) to reflect their execution dependency. However, existing methods assign node priority based on a single node characteristic (e.g., execution time), which cannot leverage the DAG structure to improve performance. In addition, the allocation methods solely consider the ready nodes, which neglects their impact on the upcoming nodes, prolonging the DAG makespan. This paper introduces a novel DAG scheduling algorithm for heterogeneous real-time systems that overcomes the limitations of existing methods. First, a novel node-level priority assignment is proposed that fully exploits the DAG structure to enhance the timing performance. Then, an allocation is constructed that speeds up the execution of high-priority nodes, with upcoming nodes taken into account. The experimental results demonstrate that the proposed method outperforms the existing one up to 14.35% in the DAG makespan.
Energy harvesting system is used to power Internet-of-Things (IoT) devices by collecting energy from the environment, allowing these devices to operate without being limited by battery life. Due to weak and unstable energy output, these devices often experience frequent power failures, leading to non-progress issues where running programs lose data and must restart from the beginning. Intermittent computing systems have been proposed to address this by saving system states through checkpoints and resuming from them after a reboot. Currently, two different checkpointing methods are widely adopted: periodic and just-in-time (JIT). The periodic method conducts checkpoints frequently and indiscriminately, without regard to the remaining energy level. This approach often results in a large number of unnecessary backups and lead to significant energy waste. In contrast, the JIT method performs checkpoints precisely when a power failure is imminent by continuously monitoring the current energy level. However, this monitoring process also consumes a significant amount of energy. To leverage the advantages of both checkpointing methods while addressing their shortcomings, we propose an adaptive checkpoint system which selects the most suitable method during runtime based on the current energy status and task execution conditions. Experimental results indi-cate that our system can achieve an average speed improvement of 1.7 times compared to using only a single method.
Developing real-time systems applications requires programming paradigms that can handle the specification of concurrent activities and timing constraints, and controlling execution on a particular platform. The increasing need for high-performance, and the use of fine-grained parallel execution, makes this an even more challenging task. This paper explores the state-of-the-art and challenges in real-time parallel application development, focusing on two research directions: one from the high-performance domain (using OpenMP) and another from the real-time and critical systems field (based on Ada). The paper reviews the features of each approach and highlights remaining open issues.
The Preemptable Waiting Locking Protocol (PWLP) is a mainstream real-time resource sharing protocol that provides predictable mutually exclusive access to shared resources. However, the analysis of PWLP can only support traditional real-time systems, preventing its application in mixed-criticality systems (MCS), which are commonly found in realistic real-time applications. In addition, existing analyses are either overly-pessimistic or computationally extensive with optimizations required. To address the above issues, this paper presents a new response time analysis of PWLP on multiprocessor MCS, enhancing both the effectiveness and applicability of PWLP on MCS. The proposed analysis provides fine-grained blocking bounds of PWLP and explicitly considers the varied task execution time under MCS, achieving accurate timing bounds without significantly increasing computation cost. Experimental results show that the proposed analysis outperforms existing analysis by improving the resulting system schedulability with much less computation cost.
Recent broadband cellular network technology requires to guarantee respect for timing constraints to ensure the required Quality of Service (QoS) and improve user experience. The Base Transceiver Station (BTS) must activate and process a large set of real-time tasks, representing user requests, on a heterogeneous many-core platform. Each request is an instance of a heterogeneous parallel and conditional Directed Acyclic Graph (HPC-DAG) task that must complete no later than a predefined deadline. Classical real-time scheduling and schedulability analysis approaches can not be directly applicable to such systems because task activation profiles can drastically change based on end-user requests. Additionally, classical schedulability analysis might exhibit scalability issues in supporting a large number of task instances on hundreds of cores. This work addresses the problem of allocating and scheduling a set of real-time tasks to a heterogeneous platform composed of hundreds of cores. We present efficient scheduling and allocation approaches to guarantee that all timing constraints are respected within a single scheduling frame. We propose novel schedulability tests, allowing us to explore numerous possible design choices for user requests. The performance of the proposed approaches is studied through a large set of synthetic experiments.
Elastic scheduling provides a framework under which the utilizations of recurrent tasks are reduced by increasing their periods in response to system overload. First proposed by Buttazzo et al. in 1998 for uniprocessor scheduling of implicit-deadline tasks, elastic scheduling was extended to multiprocessor scheduling algorithms by Orr and Baruah in 2019. In this paper, we propose and analyze improvements to elastic scheduling of implicit-deadline tasks. (i) We evaluate a new algorithm that we proposed as a short note in the Real-Time Systems journal, and demonstrate that it allows for faster admission control than Buttazzo's algorithm when applied to uniprocessor and fluid scheduling. (ii) We propose and analyze faster elastic scheduling algorithms for partitioned EDF scheduling. (iii) We provide an exact algorithm for elastic scheduling under global EDF.
Wireless systems require strict latency bounds for safety-critical applications, particularly in dynamic environments involving moving user equipment (UE) such as autonomous vehicles. Solutions in 5G mainly focus on static scheduling approaches in that regard, making them inapplicable for dynamic environments. However, latency in these dynamic settings is often unpredictable, creating a real challenge, as the need for safety is increased for moving systems, while at the same time, it is more challenging to ensure. Existing approaches typically detect latency violations after they occur, which is insufficient for real-time responsiveness, as it delays the reaction of UEs. This paper proposes a novel method to predict latency in 5G wireless communication before transmission, enabling proactive safety measures. Our approach proposes modeling of resource scheduling from a real-time perspective to apply analytical latency calculation. We introduce formulas for predicting latencies for future time intervals and discuss how to determine bandwidth relevant to latency in 5G communication. The accuracy of our latency predictions thus is dependent on forecasting the available bandwidth and traffic load. However, our studies using real-world data show that our approach results in high precision, as 95.93% of our predictions match the experienced delay, making our solution applicable for real-world deployment.
In modern intelligent factories, numerous applications require deterministic end-to-end latency for flow transmission. The 5G-TSN integrated network is aiming to meet the flow transmission requirements of time-critical applications. However, the heterogeneity between 5G and TSN, along with the non-deterministic nature of 5G, pose challenges in guaran-teeing bounded end-to-end latency. Therefore, an efficient flow scheduling algorithm becomes more crucial for deterministic communication in the 5G-TSN network. The majority of existing research focuses solely on allocating resources for either 5G or TSN, neglecting the investigation of joint resource allocation for both. This paper investigates the periodic flow scheduling problem, focusing on guaranteeing deterministic communication and the joint allocation of heterogeneous resources. We propose a novel heuristic algorithm that considers the urgency of flows, and quantifies heterogeneous resources uniformly to achieve a spatiotemporal load balancing across heterogeneous networks. Evaluation results demonstrate that our algorithm can achieve deterministic end-to-end latency for periodic flows and significantly enhance the schedulability of periodic flow sets.
Certifying graph-based workloads on multicore systems requires valid worst-case execution time (WCET) estimates, which are challenging to obtain. This warrants a method to enforce execution budgets at runtime. Allowing a node in a processing graph to overrun its budget can delay future in-vocations of that node due to data dependencies. Conversely, preventing overruns may lead to high rates of graph invocation aborts. This paper presents a budget-enforcement method that allows nodes to overrun with limited effect on future node invocations. Additionally, analysis is presented for bounding the abort probability of each graph invocation. Experimental results are given to demonstrate the efficacy of the presented method.
Many Cyber-Physical System (CPS), such as autonomous vehicles and robots, rely on compute intensive Machine Learning (ML) algorithms, especially for perception processing. A growing trend is to implement such ML algorithms in the cloud. However, the data transfer overhead and the delay introduced in the process necessitate some form of edge-cloud solution. Here, a part of the processing is done locally and the rest on the cloud, and how to do this partitioning is being explored in the body of work referred to as Split Computing (SC). In this position paper, we explore different SC architectures and discuss their implications on controller design for CPS. In particular, we discuss the delay and state estimation accuracy of these different SC architectures and how they would impact the design of the feedback controllers using them.
Reliability metrics for hardware faults in safety-/mission-critical systems have been historically based solely on hardware failure rates, quantitatively ignoring any effect of the software. Software reliability is usually considered only in terms of bugs/defects, which is a quantity hard to estimate analytically. In this article, we explore the problem of quantifying the impact of software in reliability against Single Event Upsets, highlighting the limits of the current standards that restrict the use of Commercial-Off-The-Shelf components for critical scenarios. We show how to obtain valid software reliability metrics and how this methodology significantly improves reliability estimation compared to hardware-only estimation. The reliability gain is further improved when considering real-time metrics. This analysis is the first step towards a reconciliation between software and hardware reliability and enables the quantification of reliability introduced by Software-Implemented Hardware Fault Tolerance approaches.
