Modern sensor networks often consist of larger numbers of mobile sensor nodes. In such sensor networks, multiple sensor nodes can measure common targets. If they measure their targets simultaneously, the impact of measurement errors can be reduced. Alternatively, if they perform their measurements at the same frequency while offsetting their measurement timings, temporal resolution can be enhanced. However, since a sensor network composed of mobile sensor nodes changes its topology dynamically, it becomes difficult to coordinate their measurement timing. In this work, we propose bio-inspired algorithms for the coordination of the measurement timing: synchronization, where both the periods and phases of sensor nodes are synchronized, and desynchronization, where their periods are synchronized but their phases are evenly offset. We evaluate our proposed synchronization method for these algorithms through a simulation.
AI-based traffic classification is crucial for optimizing resource allocation and threat detection in networks, particularly in resource-constrained IoT environments where traditional methods are inadequate. However, deploying large machine learning (ML) and deep learning (DL) models in such environments poses significant challenges due to their high computational requirements and storage needs, which can lead to inefficiencies and scalability issues. This paper introduces novel model optimization techniques-Min-BitNet and SlimMatrixNet-to overcome these limitations and replace state-of-the-art TinyML-based approaches. These models significantly reduce size while maintaining high accuracy: Min-BitNet achieves 99.46% and SlimMatrixNet achieves $\mathbf{9 6. 3 7 \%}$, compared to $\mathbf{9 9. 9 6 \%}$ for the uncompressed model. Validated through OMNeT++ simulations and hardware implementations, SlimMatrixNet offers superior performance in accuracy, size, and delay, providing an efficient IoT anomaly detection solution without compromising accuracy.
Federated learning (FL) offers a promising approach to improving the efficiency and privacy of Internet of Things (IoT) systems, particularly in environments where data is distributed across numerous devices. However, challenges remain in selecting the right FL model for specific applications, managing data privacy, and optimizing system performance. This paper evaluates four FL models - FedAvg, FedPer, FedProx, and FedSGD - against these challenges, focusing on their ability to optimize resource management, enhance data privacy, and reduce communication costs in real-time IoT settings. We provide a detailed comparison of their loss rates, execution times, and scalability, offering valuable insights into how each model performs under varying conditions. By addressing these key issues, our work contributes to the effective deployment of FL in distributed IoT systems, guiding the selection of the most suitable model for diverse applications.
This work presents a new reproducible test framework for Organic Computing (OC) applications in autonomous driving. We solve two major problems in performing reproducible experiments. First, we demonstrate a simple and inexpensive approach to recreate a test environment within the CARLA simulator to investigate accidents in depth as close to the real environment as possible. Secondly, we implement a new script-based framework to control mechanisms for generating repeatable experiments, ensuring consistent experimental results and verifying accurate trajectories.
Field-Programmable Gate Arrays (FPGAs) are increasingly used in critical applications and as versatile platforms for research, prototyping, and education. Their reprogrammable nature, however, makes them vulnerable to security threats, particularly through bitstream vulnerabilities. This paper presents a new approach for the real-time detection and mitigation of such vulnerabilities. We introduce BitVulLLM, a fine-tuned variant of LLAMA2 specifically used for FPGA bitstream vulnerability detection. As part of this research, we generated a comprehensive dataset of FPGA bitstreams, including secure and vulnerable configurations, to address the challenges of detecting and rectifying security flaws. Our method not only identifies vulnerabilities with high precision, but also generates secure bitstreams, significantly bolstering the security of embedded systems. This research represents a significant advancement in safeguarding FPGA applications and other use cases from cyber threats, improving the overall performance and reliability of embedded systems and hardware security.
To address key challenges in IoT systems, including efficient resource allocation, adaptive service composition, and Quality of Service (QoS) under dynamic conditions, we develop a framework called DRL-MAS integrating multi-agent systems (MAS) and deep reinforcement learning (DRL). DRL-MAS leverages MAS's decentralized decision-making capabilities and DRL's adaptive learning strengths to ensure scalability, energy efficiency, and responsiveness in distributed IoT systems. By incorporating edge computing, DRL-MAS minimizes dependency on centralized systems, reduces latency, and optimizes energy consumption. Experimental results demonstrate the DRL-MAS's effectiveness in dynamically optimizing service composition and resource management while complying with QoS requirements.
This paper introduces a novel, context-aware software architecture to enhance the security of real-time IoT applications. By integrating a robust Role-Based Access Control (RBAC) model that incorporates user location and time, we significantly strengthen protection against unauthorized access and potential attacks. This approach addresses the increasing demand for secure and reliable IoT systems, especially in critical infrastructure and sensitive applications. To validate the feasibility and performance of our architecture, we developed a functional prototype and conducted rigorous evaluations. The results demonstrate that the proposed architecture can effectively handle real-time constraints while ensuring high security.
Single-path code aims to make WCET analysis easier by eliminating data-dependent control flow. To completely negate the need for WCET analysis, single-path code must also eliminate execution-time variability from memory accesses. To be practically useful, single-path code must be optimized to be competitive with traditional WCET-analyzed code. This paper summarizes the work in Emad Jacob Maroun's PhD dissertation titled”Compiling for Time-Predictability and Performance“. Memory access compensation ensures that singlepath code exhibits constant execution time. The generated code is optimized using an improved transformation that uses generic allocators for general-purpose and predicate registers. The repetition dominance relation is used to reduce unnecessary code execution. Lastly, a heuristic list scheduler enables single-path code to utilize the second issue slot of a dual-issue processor. In addition to achieving constant execution times on a timepredictable processor, the results show varying but significant improvements of up to 145 % in performance and a reduced code size of up to 28 %. Compared to WCET-analyzed traditional code, single-path code is mostly competitive while outright superior in several cases. However, pathological cases of poor performance are still observed.
This paper presents a methodology and an associated platform for classifying and visualizing schedule deviations in public transit systems. Applied to the Montreal public transit network, the work offers two main contributions: (1) a methodology integrating real-time transit data processing (GTFS-RT), systematic/stochastic deviation classification, and multi-resolution spatial analysis using the Hexagonal Hierarchical Spatial Index (H3) system (Resolutions 9 and 10); (2) an interactive visualization platform employing KeplerGL, built upon this methodology, enabling dynamic exploration of spatio-temporal deviation patterns. The platform reveals significant schedule deviations across Montreal's network. While preliminary, the visualized patterns provide data-driven evidence to generate actionable hypotheses and guide further investigation for transit optimization and urban planning, particularly in identifying delay-prone areas and understanding spatial delay propagation.
Memory bandwidth is a critical factor in the performance of DRAM-based computing architectures, particularly in memory-intensive computations. Modern multi-core processors share critical resources, such as main memory and cache, which impact the predictability of real-time systems due to resource contention. Techniques like memory access regulation, cache partitioning, and static hypervisors aim to mitigate this contention. This paper presents an improvement of a memory control mechanism based on MemGuard, named MemGuard-RW, designed and implemented within a hypervisor. MemGuard-RW uses two performance counters for measuring the memory accesses, one for memory readings and another one for writings, thus decreasing the pessimism on the original memory access budget from MemGuard. Additionally, we extend the MemGuard schedulability analysis considering the two-counter approach. To evaluate the effectiveness of the implementation and analysis, we deployed FreeRTOS as a guest alongside three stress-generating guests, measuring the interference experienced by the FreeRTOS instance and comparing the analysis with two counters with the original analysis with one counter, using modern benchmarks. The results demonstrate that the proposed mechanism successfully regulates memory accesses, showing its potential for enhancing the predictability and performance of real-time systems in multi-core environments. Our proposed analysis with two counters reduces the upper bound of around 20 % for tasks having medium and high memory usage.
Telecommunication is a critical driver of economic and social development. 5G technologies are state-of-the-art in telecommunication, setting strong and open-ended requirements for implementing systems. Current systems for implementing baseband technologies in 5 G depend on hardware separation to ensure high-criticality tasks and low-criticality tasks do not interfere in such a way as to violate guarantees. To allow for the merging of high- and low-criticality systems into one, this paper presents two level-2 cache architectures: The contention tracking cache tracks contention events between highand low-criticality tasks, blocking any further contention if a specified limit is reached. The criticality timeout cache associates a timer with each cache line for high-criticality tasks that counts down as long as the line is not reused. During the countdown, low-criticality tasks are prohibited from evicting high-criticality cache lines. When the timer runs out, this prohibition is lifted. A simulation framework is employed to accurately model the behavior of cores accessing a memory hierarchy with various cache types. Simulation statistics demonstrate that the proposed cache architectures effectively prioritize memory accesses for critical tasks while allowing non-critical tasks to utilize any available cache space.
In safety critical computing, real-time and security concerns are often considered separately, though the behavior of a scheduling model itself may be an attack surface which can be exploited by an attacker to reduce system performance. In this work, we explore how the semantics of mode changes in mixed-criticality systems could be used as one such attack vector. This attack, dubbed Mad Monk, uses a mixed criticality scheduler's mode switches against itself by allowing a task of a lower criticality to interfere with tasks of a higher criticality, thereby forcing a disruptive mode switch which could possibly reduce service to some tasks. We describe this attack in detail, along with a case study demonstrating its risk. Furthermore, extensive simulations of this attack demonstrate its potential effectiveness based on a variety of timing and system factors.
Medical diagnosis using large language models (LLMs) like GPT-4 has shown significant promise with advancements such as MedPrompt, which leverages chain-of-thought (CoT) reasoning and choice-shuffling ensembles. However, the exponential growth in computational complexity with an increasing number of ensembles limits the scalability of such systems. This study re-implements MedPrompt from scratch and introduces a distributed framework using Ray to address these limitations. By parallelizing CoT reasoning, our approach achieves substantial reductions in processing time, enabling the use of more than 20 ensembles while maintaining state-of-the-art diagnostic accuracy of 90.6% on the MedQA dataset. Preliminary results indicate that our distributed system reduces processing time from over 4,800 seconds to less than 400 seconds for 20 ensembles.
Low-Power Wide-Area Networks (LPWANs) provide connectivity to widely-spread battery-powered devices. In such networks, very large numbers of terminals compete for radio access. Frame collisions naturally occur in the absence of coordination, which is detrimental to network performance. However, each terminal transmits relatively small and sporadic amounts of data. The design of strategies to operate large-scale LPWAN is challenging. In fact, any introduction of protocol overhead for terminal coordination purposes has a detrimental impact on device energy efficiency and ultimately battery life. Herein, this paper summarizes a doctoral thesis [1] focused on the design of scalable yet energy efficient access schemes for LPWAN. One of the key takeaways of this work is the need for dynamic access protocols, capable of adapting their behavior to the traffic load while minimizing the amount of control plane messages. In order to take a step back from the work accomplished, methodological insights about the approaches and performance evaluation tools used during the thesis are also provided. Finally, research perspectives are discussed. More specifically, the application of such schemes to Direct-to-Satellite IoT networks is foreseen as a means to enable worldwide and efficient low-power networks.
As the proliferation of devices on the Internet of Things (IoT) accelerates, the need for efficient communication technologies becomes even more critical, particularly in rural and agricultural regions where connectivity challenges are more pronounced. LoRaWAN, a Low Power Wide Area Network (LPWAN) technology, offers a promising solution due to its long-range capabilities, low power consumption, and cost-effectiveness. However, optimizing gateway placement within LoRaWAN networks remains a key challenge, especially when considering factors such as terrain coverage, node distribution, gateway capabilities, and the need for efficient communication. This paper presents a novel simulation-based approach to optimize LoRaWAN gateway placement using the FLoRa framework integrated with OMNeT++. Our methodology incorporates network performance simulation, optimization data analysis, and K-means clustering to strategically place gateways while addressing constraints such as node separation and gateway capacity. The results demonstrate significant improvements in network coverage, energy efficiency, and a reduction in the number of gateways required, offering a practical solution for the deployment of scalable and efficient IoT networks in resource-constrained environments, particularly rural and agricultural settings.
Microservices-based applications, which consist of small autonomous containerized services, have become prevalent in recent years. Kubernetes, a popular container orchestration engine, provides a wealth of features at the disposal of the developers of a microservice-based application, such as automatic load balancing, self-healing, service discovery, and more. As clusters and microservices grow in size and complexity so do monitoring costs. The flood of data and their dynamic nature require flexible and scalable monitoring approaches. The use of anomaly detection techniques and their integration with the Prometheus monitoring system for Kubernetes present a promising direction. A distributed, unsupervised, anomaly-based detection system for microservices applications in Kubernetes is presented, with experiments conducted to assess the models' ability to detect abnormalities and their severity.
This paper explores the relationship between network data complexity and machine learning (ML) performance, focusing on distributed and real-time IoT systems. Using intrinsic dimensionality (ID) to measure structural complexity, we analyze 20 datasets ($\mathbf{1 0}$ for network and IoT systems and $\mathbf{1 0}$ for non-network systems) and show that network datasets have lower ID values, indicating simpler structures that correlate with improved ML performance. We identify optimal algorithms for different ID ranges, offering practical guidance for selecting ML models tailored to network data. Additionally, we find that Euclidean distance outperforms Hamming distance for complexity measurement across both categories of data, though its higher computational cost should be considered for real-time IoT applications. These findings provide valuable insights for selecting efficient ML algorithms and metrics, supporting scalable and time-sensitive IoT systems.
Cyber-Physical Systems (CPSs) are large and complex systems, often playing a crucial role in the organisations in which they are deployed. Malfunctions in these systems are a significant concern, as they can be both costly and create unsafe situations. Downtime resulting from malfunctions can be mitigated through the use of robust diagnostic systems. CPSs share many commonalities across different domains. This fact can be used to formulate a broad methodology for developing diagnostic systems. Model-based systems engineering (MBSE) techniques, such as metamodelling, megamodelling, model slicing, and modelling through domain-specific languages, can provide a solid foundation for such a methodology. This paper outlines a PhD research project that aims to define such a MBSE-based methodology for defining diagnostics of CPSs using the aforementioned techniques. The research has been laid out in terms of the research questions that are to be investigated, the expected contributions, and the proposed approach to reach these contributions.
Hearing aids and remote conference systems benefit from noise reduction. Current noise reduction approaches include machine-learning models that run on edge devices like hearing aids, AirPods, or headsets. Although not a safety-critical application, audio processing is a real-time application. We present a real-time enabled solution of speech enhancement with generation of $\mathbf{C}$ code for embedded devices, executing on a real-time processor, and analyzing the worst-case execution time for that application. Using the Patmos processor and the Platin WCET analysis tool, we can guarantee that we process noise canceling within the given deadline.
As Artificial Intelligence makes its way to edge devices, it becomes necessary to understand how Learning Enabled Components (LECs) will perform in resource-limited environments. A two-part evaluation procedure is developed here using a combination of testing data to evaluate the LECs' performance, including but not limited to time-domain performance, independent of the target system, for assessing the LEC within the context of system it will be deployed. The target system for this evaluation is a BlueROV2 device simulated in Gazebo using the UUV Simulator package that has been configured to function as an autonomous underwater vehicle (AUV) for infrastructure inspection. The task of the vehicle was to detect and track an underwater pipeline using a side-scan sonar. Nine LEC architectures were constructed in Tensorflow, trained, quantized, and deployed on a Google Edge Tensor Processing Unit (TPU) LEC accelerator for evaluation using generated data and deployed as a hardware-in-the-loop simulation using the BlueROV2 model. It was found that the Mean IoU metric in the evaluations that used sonar data from (simulated) pipes that were smaller than the ones used in the training set had the strongest correlation with the LECs ability to continue to track an underwater pipe during the mission simulations. The size of the model did not increase the time required to load a sonar image on the edge device and interpret the sonar images suggesting that neither model size, nor inference time affected the results of the evaluation. The architecture of a given LEC does not guarantee its performance within the context of an AUV executing a pipe inspection task and, therefore, must be evaluated within the context of the full system to properly characterize its performance.
