
Energy efficiency and consumption are currently the challenging issues in current Petascale and in designing future Exascale systems. The European Union Horizon 2020 project READEX (Runtime Exploitation of Application Dynamism for Energy-efficient Exascale computing) develops a tools-aided online approach to analyze and auto-tune HPC applications for energy efficiency on Exascale systems. It exploits dynamism that occurs due to the variation in the application behavior between iterations of the time loop as well as changing control flow within the time loop. This paper describes the readex_interphase tuning plugin, which analyzes the inter-loop dynamism. The plugin performs clustering using DBSCAN for normalized PAPI metrics, and computes the best tuning parameter settings for each cluster. It verifies the cluster analysis results, and finally computes static and dynamic savings. The inter-phase tuning strategy was evaluated for miniMD and INDEED, and the energy savings obtained validate the effectiveness of this methodology.
Adaptive Computational offloading systems achieve context specific optimization on mobile and pervasive devices by offloading computational components to a resource copious remote server or cloud. However, with recent advances in the computational capacit
We present a significantly improved implementation of a parallel SVM algorithm (PSVM) together with a comprehensive experimental study. Support Vector Machines (SVM) is one of the most well-known machine learning classification techniques. PSVM employs the Interior Point Method, which is a solver used for SVM problems that has a high potential of parallelism. We improve PSVM regarding its structure and memory management for contemporary processor architectures. We perform a number of experiments and study the impact of the reduced column size p and other important parameters as C and gamma on the class-prediction accuracy and training time. The experimental results show that there exists a threshold between the number of computational cores and the training time, and that choosing an appropriate value of p effects the choice of the C and gamma parameters as well as the accuracy.
The process of weather forecasting produced by numerical weather prediction (NWP) models is complex and not always accurate. Moreover, it is generally defined by its very nature as a process that has to deal with uncertainties. In previous works, a new weather prediction scheme, Genetic Ensemble (G-Ensemble), was presented, which uses evolutionary computing methods. Particularly, it uses Genetic Algorithms (GA) in order to find the most timely 'optimal' values of model closure parameters that appear in physical parametrization schemes, which are coupled with NWP models. The presented scheme showed significant improvement of weather prediction quality and, moreover, the waiting time for an enhanced weather prediction result was reduced by executing a parallel G-Ensemble scheme over HPC platforms. In this work, however, we test the same scheme with different GA configurations regarding its Crossover type and ratio, and by variating its initial population size in order to get better predictions. The main concern behind this work is to provide a more detailed study on how the GA used in G-Ensemble scheme could be tuned depending on the available computational resources in operational scenarios. Finally, experimental results are discussed of a weather prediction case using historical data of a well known weather catastrophe: Hurricane Katrina that occurred in 2005 in the Gulf of Mexico. Obtained results provide significant enhancement in weather prediction.
In the field of integrated circuit physical design automation, the problem of obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is a fundamental problem and has attracted a lot of research attention. In this paper, a parallel algorithm for constructing OARSMTs is proposed. The algorithm is based on maze routing and double front-wave expansion. Experimental results show that our algorithm not only generates very short wires, but also performs efficiently on shared-memory multi-core computer systems. Compared with the sequential execution of our parallel program that has been implemented, the program can achieve 23% speed-up on average while running on a multicore workstation.
One of the scalability issues in parallel applications, in which each process creates each file and writes data to the file, is the scalability of file management due to the increasing number of files. To mitigate this issue, a new file aggregation mechanism, called the file composition technique, is proposed. Unlike existing aggregation mechanisms, the file composition technique aggregates multiple files created by parallel processes into a single shared file without changing the code of file I/O operations. In contrast with the metadata operations in existing aggregation mechanisms, the metadata operations are distributed to each process in order to carry out scalability. The proposed file composition technique is evaluated using a climate simulation code, called SCALE. The result shows that the elapsed time of file output is approximately 30% faster than that of original POSIX I/O functions.
Demand for multi-process resource invariably outstrips supply and users must often share some common provision. Where batch-based, whole processor allocation proves inflexible, user programs must compete at runtime for the same resource so the load is changeable and unpredictable. We are exploring a mechanism to balance the runtime load by moving computations between processors to optimize resource use. In this paper, we present a generic algorithmic farm skeleton which is able to move worker tasks between processors in a heterogeneous architecture at runtime guided by a simple dynamic load model. Our experiments suggest that this mechanism is able to effectively compensate for unpredictable load variations.
In this paper we present a scheduling algorithm for VLIW architectures with chained functional units. We show how our algorithm can help speed up programs at the instruction level, for an architecture called REPLICA, a configurable emulated shared memory (CESM) architecture whose computation model is based on the PRAM model. Since our LLVM based compiler is parameterizable in the number of different functional units, read and write ports to register file etc. we can generate code for different REPLICA architectures that have different functional unit configurations. We show for a set of different configurations how our implementation can produce high quality code; and we argue that the high parametrization of the compiler makes it, together with the simulator, useful for hardware/software co-design.
There is an increasing demand for tools which support the land use planning process and one of the most complex tasks of this process is the design of a land use zoning map. With this aim an algorithm based on simulated annealing has been designed to optimize the delimitation of land use categories according to suitability and compactness criteria. The high number of plots involved in a land use plan leads to high computational costs. Two parallel versions were implemented. The first one improve the final solution using different parameters in parallel. The second one gets advantage of the spatial parallelism. Results on a real case of study show that the solutions provided by our algorithms are similar to the solution provided by experts, but much faster and with less effort. The parallel versions of the code present good results in terms of the quality of the solution
Channel routing is a type of problems arising in the detailed routing phase of VLSI physical design automation as well as in the design of printed circuit boards (PCBs). It has been known that channel routing problems can be formulated as constraint programming (CP) problems and thus CP solvers can be used to find solutions. In this article, we present a mixed integer linear programming (MILP) formulation to gridded dogleg channel routing problems. As a result, parallel MILP solvers, which have the ability to exploit the computational power of multi-core processors, can be used to find solutions. Experimental results show that high degrees of scalability can be achieved. Owing to the properties of MILP problems, it is possible to further shorten the execution time if a computer containing more processor cores is available.
When most commercial clusters had one processor core each, decreasing the runtime meant executing the application over more nodes – the associated cost (in $) would scale linearly with the number o ...