A Programmable High Efficiency Charge Pump System for Embedded Flash Memory with Improved Current Driving Capability

Flash memory, a key element in embedded systems, necessitates high voltage for its operation, which is usually provided by charge pumps. This paper presents a programmable high efficiency charge pump system in 40 nm bulk CMOS technology powered from a 1.1 V supply. The proposed system integrates low-voltage MOS self-adaptive body-biased cross-coupled charge pumps and a high-voltage MOS self-adaptive body-biased cross-coupled charge pump with a doubler structure. The system adaptively activates the appropriate charge pump combination based on the current load, working in conjunction with a novel clock coupled voltage modulation circuit to achieve reduced power consumption and improved efficiency. The programmable high efficiency charge pump system can stabilize an output voltage of 6V at 292 mu A and 8V at 235 mu A under a 50 MHz clock. It achieves a peak efficiency of 64.04% at 292 mu A current load and occupies 0.145 mm2 in area.