This paper presents an integrated LC filter based on a resin substrate and plastic packaging technology. The proposed filter operates at a center frequency of 1.8 GHz with a bandwidth of 1 GHz, and has a compact size of 7.5mm × 5 mm × 1.15mm. Solenoid inductors are embedded in the substrate, while capacitors with package size of 01005 are surface-mounted on the substrate. The filter was fabricated using standard packaging processes of molding. The measured results shows that the proposed filter achieves an insertion loss of 2.38 dB at the center frequency and a return loss greater than 15 dB within the frequency range of 1.3 GHz to 2.3 GHz. Additionally, it provides an out-of-band rejection greater than 35 dB in the stop-bands from 0.5 GHz to 0.92 GHz and from 2.73 GHz to 3.8 GHz.

This paper proposes a broadband microwave phase-locked frequency synthesizer micro-module with a size of only 10.6mm×10.6mm×3.5mm, including ball grid array (BGA) solder balls. An integrated phase locked loop (PLL) chip, a micro-computer chip, a low phase noise voltage regulator chip, loop filters and passive devices are integrated into a high temperature co-fired ceramic (HTCC) package. The output frequency of the phase-locked frequency synthesizer covers from 0.01GHz to 20GHz, and the phase noise is less than -85dBc/Hz@1kHz.

This paper proposes an innovative three-dimensional (3D) stacked structure for high-density integrated system-in-package (SiP). The proposed hybrid package-on-package (PoP) structure is composed of a top module based on a silicon interposer and a bottom module based on a resin substrate. In order to establish reliable electrical interconnection between the top and bottom modules, copper pillars with a height of 0.9 mm are mounted on the resin substrate before molding. Through-silicon vias (TSVs) in the silicon interposer have a height of 0.2 mm and a diameter of 20 μm. A prototype of the proposed PoP structure has been simulated, fabricated, and tested. The measurement results show that the top-to-bottom transition of the PoP structure, which includes the TSVs and the copper pillars, achieves an insertion loss of less than 1.4 dB and a return loss of less than -10 dB over the frequency band from direct current (DC) to 7 GHz. This provides a reliable and efficient packaging solution for 3D stacking hybrid PoP modules.

Polymer-based embedded silicon-based fan-out (P-eSiFO) is a new packaging technique, which provides a way to high-density integration of high-performance chiplets. However, integrating multiple materials with diverse physical properties in the P-eSiFO leads to substantial warpage during downstream high-temperature manufacturing processes. In this study, a thermomechanical model of a P-eSiFO was developed to examine the thermomechanical with varying structural parameters and material selections. Test dies having an area of 0.5 cm(2) were embedded in a 500-mu m-thick silicon carrier following the P-eSiFO process. After careful parameters, optimization chip warpage can effectively decrease by over 60%. Experimental results showed that the height difference between the embedded chip and its silicon interposer can be reduced down to 1 mu m with optimized parameters after high-temperature processes. This work provides useful insights for addressing multimaterial warpage concerns during thermal processes in advanced packaging.

This paper proposes a design for an ultra-wideband high-isolation three-dimensional (3D) stacked HTCC (High-Temperature Co-fired Ceramic) package structure. By optimizing the metal frame structure of the HTCC package, a gold wire fence has been formed between the top-layer circuit substrate and the package sidewall by the gold wire bonding process, which significantly reduces signal crosstalk between multilayer circuit substrates within the HTCC package and enhances the integration density of the 3D stacked structure. Additionally, the interconnection structure between the HTCC package and the integrated internal chips has been optimized, so the low-loss radio frequency (RF) signal transmission from DC to 40 GHz is attained.

Facial palsy (FP) profoundly influences interpersonal communication and emotional expression, necessitating precise diagnostic and monitoring tools for optimal care. However, current electromyography (EMG) systems are limited by their bulky nature, complex setups, and dependence on skilled technicians. Here we report an innovative biosensing approach that utilizes a PEDOT:PSS-modified flexible microneedle electrode array (P-FMNEA) to overcome the limitations of existing EMG devices. Supple system-level mechanics ensure excellent conformality to the facial curvilinear regions, enabling the detection of targeted muscular ensemble movements for facial paralysis assessment. Moreover, our apparatus adeptly captures each electrical impulse in response to real-time direct nerve stimulation during neurosurgical procedures. The wireless conveyance of EMG signals to medical facilities via a server augments access to patient follow-up evaluation data, fostering prompt treatment suggestions and enabling the access of multiple facial EMG datasets during typical 6-month follow-ups. Furthermore, the device’s soft mechanics alleviate issues of spatial intricacy, diminish pain, and minimize soft tissue hematomas associated with traditional needle electrode positioning. This groundbreaking biosensing strategy has the potential to transform FP management by providing an efficient, user-friendly, and less invasive alternative to the prevailing EMG devices. This pioneering technology enables more informed decision-making in FP-management and therapeutic intervention.

To further optimize the design, the radiated power of one-dimensional magneto-acoustic antenna with magnonphonon interaction is derived. the dynamic, magneto-elastic component of the antenna is introduced by model of the magnetic material layer’s free enthalpy density, and the magneto-elastic coupling links the time dependent lattice strain tensor $\varepsilon$ to the magnetic environment. According to vibrational modes of surface acoustic waves and the magnetoelastic driving field, the energy absorption expression of the ferromagnetic resonance driven by surface acoustic waves is established by solving the effective magnetic field and the simple harmonic vibrational mechanical energy equation simultaneously. The effect of magnon-phonon interaction on radiation performance of magneto-acoustic antenna is studied, and the change of radiated efficiency with the increase of bias magnetic field is explored.

Driven by the demands of the intelligent industry, the thermal management of high power chips is causing huge concern. In the last several decades, microfluidic cooling has demonstrated great potential in device cooling applications. This paper presents a monolithically integrated manifold microchannel cold plate that can become a general embedded cooling method for most chips. The test samples are fabricated by the MEMS process and test. The experimental result shows that the cold plate can remove more than 500W/cm 2 heat with a thermal resistance below 0.25 K•cm 2 /W and the global average convective heat transfer coefficient was approximately 43300 W/m 2 •K. This approach is important for solving thermal management challenges in electronic devices.

Driven by the wider application of the new generation of wide-bandgap materials, thermal management for high power electronic devices is becoming a growing concern. Microfluidic cooling technology is considered a promising technology to overcome the thermal challenge because it allows for more efficient heat dissipation due to the powerful heat convection of the liquid. In this paper, by employing a numerical study, a hybrid discontinuous microchannel heat sink combining manifold with pin fins (DMC-MPF) is proposed. Compared to the traditional design, the DMC-MPF enhances heat transfer and reduces flow resistance especially when the thermal conductivity of the microchannel is low. In particular, for a 2 × 2 mm 2 chip at a pressure drop of 50 kPa, the thermal resistance can reach to 0.04°C‧cm 2 /W. Compared to the original design, when the thermal conductivity of the microchannel is 2 W/m‧K and the heat flux at 1500 W/cm 2 , the DMC-MPF can reduce the maximum temperature by 50 % and improve the temperature uniformity significantly. This work provides a very promising and efficient single-phase microchannel cooling scheme used in the thermal management of RF electronics with high heat flux.

Heat fluxes of GaN-based high electron mobility transistors (HEMTs) can reach dozens of kilowatts per square centimeter, and the heat is generated only within a small area with feature size of micrometer to millimeter length scales, which poses a huge challenge for thermal management. In this study, an embedded microfluidic cooling solution is proposed to dissipate heat from the hotspots, and thermal test vehicles are fabricated using the Micro-Electro-Mechanical System (MEMS) process. Cooling performances of hotspots with sizes ranging from 40 x 40 mu m(2) to 500 x 500 mu m(2) and varying locations are demonstrated. Thermal resistances of the test samples are analysed and the heat transfer coefficient can achieve 1.5 x 10(5) W/(m(2).K) using embedded microchannel cooling. We propose a compound plate spreading thermal resistance model to demonstrate the effect of the dielectric layer and the size of the heat source on heat dissipating capability of the microfluidic cooling system. Based on the thermal spreading model, when the heat source is small, integrating high thermal conductivity materials near the heat source can reduce its total thermal resistance by two orders of magnitude. By balancing the heat spreading resistance with the convective resistance of microchannel cooling, we find that similar to 1 mm can be considered as the critical length for distinguishing the primary thermal management approach for different sized hotspots. This paper provides useful design guidelines for embedded microchannel cooling of devices with localized heat generation patterns, such as HEMT devices.

This work presents a performance-enhanced acoustic wave filter with wafer-level packaging (WLP) by integrating adjustable matching inductors. The three-dimensional (3D) spiral inductors are designed for the impedance match of the acoustic filter chip. The inductance value can be continuously adjusted by selecting the different bonding position of the bond wires on the inductor, so the filtering performance of the acoustic wave filter can be enhanced greatly. A C-band film bulk acoustic resonator (FBAR) filter with a compact 3D spiral inductor with an inductance of 2.1 nH at 1 GHz and a maximum $Q$ factor of 49.5 has been designed and implemented on the multilayered packaging substrate. The simulation results show that the proposed FBAR filter can obtain a better in-band response. According to the test results, the in-band ripple of the FBAR filter with a center frequency of 5.9 GHz reduces from 1.3 dB to 0.15 dB comparing to the FBAR filter without the inductors, while the insertion loss reduces 1.6 dB. The performance-enhanced WLP FBAR filter can be used in the RF front-end module (FEM) for mobile communication systems.

This paper proposes A low-cost, high-density integrated transceiver module with two-stage superheterodyne architecture based on PCB stacking structure. Firstly, a reasonable compartmentalized design is applied to various functional circuits within the module, achieving high-density integration. Additionally, EM simulation is conducted for the distribution of the isolation solder balls between the PCBs, ensuring a high isolation between different functional circuits. Furthermore, two-stage FBAR filters with an out of band rejection of more than 40dBc are used to enhance the suppression for the intermodulation distortion of the transceiver. A transceiver module prototype has been designed, fabricated and tested. The intermodulation suppression is 64 dBc, and the size of the module is 10.5 x 18 x 3.6 mm(3). The proposed transceiver module has the characteristics of miniaturization, low cost and high isolation, which can be used for multi-band high performance communication systems.

With the increasing power density of electronic devices combined with the development of advanced package technologies, thermal management has become an increasingly critical challenge. Passive heat spreaders such as vapor chambers provide a promising solution for mitigating hotspots. Vapor chambers operate with microporous wicks that move the working fluid via capillary action, while fluid vaporization from the wick menisci facilitates efficient heat dissipation. While many prior studies have focused on optimizing evaporator wick to increase the maximum capillary-limited heat flux, an equally important design goal is to minimize the thermal resistance of heat areas. In this study, we introduce a systematic modeling framework to optimize the design of segmented micropillar wicks consisting of diverse geometric zones and height variations corresponding to a specific heating configuration. Using the NSGA-II algorithm, we generate Pareto fronts of the optimal distributions of segmented micropillars with pitch ranging from 20-50 mu m and height ranging from 25-100 mu m. Our model captures the effect of varying interfacial meniscus shapes across the micropillar wick to determine the spatial distribution of temperature and heat flux. We find that optimized segmented wicks, featuring graded height and density, are capable of increasing the dry-out heat flux by 333% while reducing thermal resistance by 71% compared to homogeneous wicks. The specific fractions of each segment within the wick can vary depending on the targeted heat flux and thermal resistance operating criteria. This research provides useful design guidelines for graded, three-dimensional micropillar wicks and the same methodology can be extended to other types of wick structures as well.

Flip-chip bonding is currently the preferred process for RF front-end module chip assembly. This paper proposes a flip-chip interconnection structure based on the gold bumps for the face-up monolithic microwave integrated circuit (MMIC) chip. The vertical interconnection based on the quasi-coaxial structure on the chip has good RF performance. The MMIC chip can be well grounded through multiple gold bumps while ensuring the mechanical strength after assembly. In order to verify this scheme, a prototype of a MMIC chip on a ceramic substrate with the gold bump flip-chip interconnection structures has been designed, fabricated and tested. The tested results show that the insertion loss of the vertical interconnection structure was 0.2 dB at 12 GHz, which can be used up to 18 GHz for the high-density and high-performance RF front-end modules (FEMs).

In this paper, a C-band folded low-pass filter is realized in the planar circuit by utilizing a U-shaped probe. The proposed filter consists of four microstrip patches and a U-shaped probe. The configuration, equivalent circuit and design method of the proposed filter are demonstrated. A prototype of the low-pass filter operating in C-band has been designed, fabricated and measured. The maximum insertion loss of the fabricated filter is about 0.8 dB from 5 GHz to 6 GHz, while the maximum return loss is -11 dB. The out of band rejection is over 30 dB at 12 GHz. The measured results show reasonable correlation with the ideal circuit and the simulated results. The proposed low-pass filter can be used for the high power transmit/receive (TR) module in active electronically scanned array (AESA).

This letter presents a compact and broadband TE 10 –TE 20 mode converter for millimeter-wave and terahertz applications. The input rectangular waveguide (RWG) and output over-mode waveguide (OMWG) are in-line and orthogonal in arrangement. In this converter, the waveguide mode is converted in the short height-reduced and width-widened gradient waveguides. A simple cuboid matching structure is employed to improve bandwidth and conversion efficiency, and a bed of nails is applied to the waveguide profile to suppress electromagnetic (EM) leakage and facilitate assembly at high frequencies. For further verification, a pair of WR-4.3 band prototypes were fabricated and measured. In the range of 170–252 GHz (38.9%-bandwidth), the measured insertion loss of the back-to-back converters is found to be around 0.86 dB with the worst return loss of 14 dB except for a slight deterioration at 172 GHz. Deducting the waveguide insertion loss, the conversion efficiency is higher than 98%.

Importance: Brain-computer interface (BCI) decodes and converts brain signals into machine instructions to interoperate with the external world. However, limited by the implantation risks of invasive BCIs and the operational complexity of conventional noninvasive BCIs, applications of BCIs are mainly used in laboratory or clinical environments, which are not conducive to the daily use of BCI devices. With the increasing demand for intelligent medical care, the development of wearable BCI systems is necessary. Highlights: Based on the scalp-electroencephalogram (EEG), forehead-EEG, and ear-EEG, the state-of-the-art wearable BCI devices for disease management and patient assistance are reviewed. This paper focuses on the EEG acquisition equipment of the novel wearable BCI devices and summarizes the development direction of wearable EEG-based BCI devices. Conclusions: BCI devices play an essential role in the medical field. This review briefly summarizes novel wearable EEG-based BCIs applied in the medical field and the latest progress in related technologies, emphasizing its potential to help doctors, patients, and caregivers better understand and utilize BCI devices.

以GaN为代表的新一代半导体材料具有宽禁带、高电子饱和速率、高击穿场强等优异的电学性能，使得射频、电力电子器件有了具备更高功率能力的可能，目前限制器件功率提升的主要瓶颈是缺少与之匹配的散热手段。具有极高热导率的金刚石已成为提升器件散热能力的重要材料，学术界针对金刚石与功率器件集成的先进热管理技术已经开展了大量有益的研究与探索，但是由于金刚石具有极强的化学惰性和超高的硬度，在实际集成和工艺加工过程中，金刚石-GaN界面容易出现热性能和可靠性问题，甚至会导致器件失效。对金刚石热管理技术的研究进展和存在的问题进行了深入分析，并对未来主要工作方向做了展望。

In this article, a class of novel power divider (PD) with TE10/TE20 dual-mode operation characteristic is proposed and demonstrated for the first time. The PD is based on low-loss groove gap waveguides with half-height pins and is shaped into a cruciform $E$ -plane coplanar magic-T, which has four coplanar waveguide arms. Unlike all conventional magic-Ts, its $E$ -plane waveguide dominates TE20 mode, and $H$ -plane waveguide dominates TE10 mode. Herein, compact waveguide transformers, waveguide steps, and cuboid waveguide ridges are employed to achieve broadband impedance matching, efficient mode conversion, and compact dimension. Therefore, the input power can be equally divided whether TE20 mode is excited at the difference port or TE10 mode is excited at the sum port. Conversely, TE10 and TE20 modes with equal power can be obtained by exciting TE20 mode at any output port. In either case, the free port helps improve the isolation. Moreover, a broadband TE10–TE20 mode converter is designed and fabricated to facilitate the measurement. The proposed prototypes are verified in the WR-4 band, and the measured results are excellent and in good agreement with the simulated results within the desired 180–250 GHz.

A coupled-line coupler with column grid array (CGA) package is proposed and investigated in this paper. The coupler configuration consists of a pair of microstrip coupled line and two pairs of coupled column that integrated in a column grid array package. The schematic diagram of the coupler and an approximate design method is given. A prototype of the proposed coupler with -16dB coupling coefficient has been designed, fabricated, and measured. Good correlation between the measured results and those of the theoretically designed justifies the approximate design process is good enough to meet the requirement for engineering applications.