Embedded device for implementing the virtual network interface, including a universal interface determination module, the packet / unpacking module and a transmission / reception module; methods to achieve virtual network interface, the device is not equipped for embedded network interface, comprising: after the embedded device transmitting the IP packets to be encapsulated into the data frames on which the universal interface that can be recognized and identified with a virtual network interface, the data frame sent via the universal interface; if received from the embedded device to the common interface after the data frame, if it is determined that the data frame carries a virtual network interface identifier, then the parsed data frame from the IP packet delivery to the application layer. According to the present invention, as compared with the prior art, the use of technology virtual network interface can provide a lot of room for optimization device miniaturization, low cost, low power consumption, particularly in resource intensive embedded systems this point is particularly important.

In order to catch the events that satisfy the given importance among the relative frequent events,RFAI is proposed,which first gathers the relative frequent events and puts them in buffers and then marks them with the given importance.Making use of such events in the Run-time optimization can gain better optimization value and higher stability.

The idea of two-level Trace Cache is proposed which provide a second-level trace cache that captures replaced traces from first-level trace cache due to capacity conflict,to partly lighten this problem and improve processor performance. Accordingly,the access pressure of instruction cache is alleviated and such a free resource can be used in others aspects,such as trace preconstruction.Results show that for big-work-set programs,such as go and gcc,adding 1MB second-level trace cache to 64KB first-level trace cache increases processor performance by 13% and reduces access pressure of instruction cache by 27%.

Trace preconstruction mechanism proposed in this paper observes the instruction stream, and marks the frequent miss trace andconstructs a set of traces using the instruction fetched from the conventional instruction cache in advance of when they are needed. Path-based tracepreconstruction tracks the execution history of the traces, when predicting the next trace to be fetched, it also predicts the next nth trace and decidesweather it should be pre-constructed or not. Constructing these traces before using them, the trace cache miss rate is reduced significantly.