The advent of Vision-Language-Action (VLA) models represents a significant leap for embodied intelligence, yet their immense computational demands critically hinder deployment on resource-constrained robotic platforms. Intuitively, low-bit quantization is a prevalent and preferred technique for large-scale model compression. However, we find that a systematic analysis of VLA model's quantization is fundamentally lacking. We argue that naively applying uniform-bit quantization from Large Language Models (LLMs) to robotics is flawed, as these methods prioritize passive data fidelity while ignoring how minor action deviations compound into catastrophic task failures. To bridge this gap, we introduce AutoQVLA, the first action-centric quantization framework specifically designed for embodied control. In a sharp departure from the rigid, uniform-bit quantization of LLM-based methods, AutoQVLA introduces a highly granular, channel-wise bit allocation strategy. Its core mechanism is to directly measure the final action-space sensitivity when quantizing each individual channel to various bit-widths. This process yields a precise, per-channel importance metric that guides a global optimization, which elegantly unifies quantization and pruning (0-bit) into a single, cohesive framework. Extensive evaluations on different baselines demonstrate the superiority of our approach. In the LIBERO, the quantization version of OpenVLA-OFT with our method requires only 29.2% of the original model's VRAM while maintaining 98.9% of its original performance and achieving a 1.49$\times$ speedup. This translates to a 22.6% performance improvement over the LLM-derived method SmoothQuant. Our work establishes a new, principled foundation for compressing VLA models in robotics, paving the way for deploying powerful, large-scale models on real-world hardware. Code will be released.

High-performance Face Anti-Spoofing (FAS) systems depend critically on extensive labeled data, while Multi-Modal FAS (MMFAS) exacerbates this dependency due to the increased complexity of collecting and annotating multi-modal data. To address this challenge, we propose a novel framework called Multi-Modal Self-Supervised FAS (M2S2FAS), which introduces a new network architecture alongside three carefully designed pretext tasks. The primary objective of M2S2FAS is to model inter-modal correspondences, thereby generating versatile pre-trained weights that can be effectively utilized across different modalities. Our framework demonstrates its efficacy through minimal fine-tuning, achieving high-performance levels. Extensive experimental evaluations on widely used multi-modal FAS datasets validate the superiority of the proposed method.

In this paper, the temperature dependence of parallel and overlapping MOS-SCR ESD protection structures fabricated by DSOI process is investigated. Transmission Line Pulse (TLP) experiments results indicate that as the ambient temperature increases from 25 degrees C to 185 degrees C the trigger and holding voltages of the overlapping structure decrease by 41.9 % and 35.7 %, respectively, while those of the parallel structure decrease by 35.7 % and 21.7 %. The overlapping structure exhibits stronger temperature sensitivity in triggering. To elucidate the underlying mechanisms, 3D TCAD simulations were developed to capture the temperature-dependent trends and enable physical mechanism analysis. The results reveal that enhanced electro-thermal coupling between the GGNMOS and SCR in the overlapping configuration can accelerate local temperature elevation, intensify the band-to-band tunneling (BTBT) effect, and thereby render the device more susceptible to triggering. The results elucidate the role of structural design in high-temperature electrostatic discharge behaviour, offering useful guidance for enhancing the reliability of DSOI ESD protection devices in high-temperature environments.

The detection of face forgery has become increasingly vital due to the severe security concerns posed by face manipulation techniques. While recent studies on forgery detection have demonstrated promising results when the training and testing samples come from the same domains, the problem remains challenging when attempting to extend the detector to unseen methods. In this work, we propose an innovative approach to enhance the generalization capability of forgery detection methods by exploring degradation inconsistency clues interspersed between the background and the manipulated face regions. Our motivation stems from the observation that digital photos undergo different degradation during acquisition and transmission, resulting in backgrounds and faces from different sources containing distinct degradation patterns in the forged faces. The proposed framework, termed the Degradation Consistency Learning Framework, integrates two core components: a data generation network that modulates degradation transformations to obtain tampered facial images, and a detection network that mines degradation inconsistency clues from both spatial and frequency domains. These two components are tightly coupled through adversarial training, forming a dynamic architecture akin to a Generative Adversarial Network (GAN). Experimental results on different benchmark and evaluation protocols (i.e., indataset and cross-dataset) have demonstrated the effectiveness of our method.

Based on SOI Pseudo-MOS, an equivalent circuit model of non-equilibrium body potential (Vneq) is proposed. The non-equilibrium majority carriers cannot be neglected to interpret the mechanism of Vneq. An accurate mathematical Vneq is determined through bringing non-equilibrium majority carriers into the discrete Poisson equation, which is validated by TCAD simulations.

Although unlearning-based defenses claim to purge Not-Safe-For-Work (NSFW) concepts from diffusion models (DMs), we reveals that this "forgetting" is largely an illusion. Unlearning partially disrupts the mapping between linguistic symbols and the underlying knowledge, which remains intact as dormant memories. We find that the distributional discrepancy in the denoising process serves as a measurable indicator of how much of the mapping is retained, also reflecting the strength of unlearning. Inspired by this, we propose IVO (Initial Latent Variable Optimization), a concise and powerful attack framework that reactivates these dormant memories by reconstructing the broken mappings. Through Image Inversion}, Adversarial Optimization and Reused Attack, IVO optimizes initial latent variables to realign the noise distribution of unlearned models with their original unsafe states. Extensive experiments across 8 widely used unlearning techniques demonstrate that IVO achieves superior attack success rates and strong semantic consistency, exposing fundamental flaws in current defenses. The code is available at anonymous.4open.science/r/IVO/. Warning: This paper has unsafe images that may offend some readers.

The high cost and accessibility problem associated with large datasets hinder the development of large-scale visual recognition systems. Dataset Distillation addresses these problems by synthesizing compact surrogate datasets for efficient training, storage, transfer, and privacy preservation. The existing state-of-the-art diffusion-based dataset distillation methods face three issues: lack of theoretical justification, poor efficiency in scaling to high data volumes, and failure in data-free scenarios. To address these issues, we establish a theoretical framework that justifies the use of diffusion models by proving the equivalence between dataset distillation and distribution matching, and reveals an inherent efficiency limit in the dataset distillation paradigm. We then propose a Dataset Concentration (DsCo) framework that uses a diffusion-based Noise-Optimization (NOpt) method to synthesize a small yet representative set of samples, and optionally augments the synthetic data via "Doping", which mixes selected samples from the original dataset with the synthetic samples to overcome the efficiency limit of dataset distillation. DsCo is applicable in both data-accessible and data-free scenarios, achieving SOTA performances for low data volumes, and it extends well to high data volumes, where it nearly reduces the dataset size by half with no performance degradation.

In this work, the transport mechanisms in p-type superlattice FinFETs are investigated from room to cryogenic temperatures, and their superior performance is experimentally demonstrated compared with conventional silicon-germanium (SiGe) and silicon (Si) channel FinFETs. At room temperature, the superlattice structure achieves an ON-state current (ION) of up to 302 μA μm-1, which is attributed to a conductive two-dimensional hole gas (2DHG) formed at the Si/SiGe heterojunction. TCAD simulations reveal that the 2DHG significantly enhances volume-inversion transport. The observed temperature dependence of Gm and mobility further supports the contribution of the 2DHG to ION. Further analysis with density functional theory (DFT) explains the improved subthreshold swing (SS) by comparing the interface density of states (DOS) of SiGe/HfO2 and Si/HfO2. The reduced interface scattering under volume inversion and the reduced lattice scattering at cryogenic temperatures enable superlattice FinFETs to achieve high ballistic rates (0.81 at 77 K), as validated by low-temperature electrical measurements. Finally, by combining DFT with non-equilibrium Green's function (NEGF) simulations, the superlattice FinFETs are shown to be some of the promising candidates for sub-7 nm technology nodes.

Dataset distillation (DD) seeks to compress large datasets into small, synthetic ones while preserving their model training efficacy. While recent diffusion-based methods have advanced DD by generating high-quality samples, they typically rely on fixed-condition text-to-image models and operate in low-level latent spaces, limiting diversity and semantic fidelity. In this work, we propose CADD (Condition Anchor-based Dataset Distillation), a novel framework that shifts the distillation process into the condition space of an image-to-image diffusion model. By representing classes as learnable condition anchors, CADD enables semantically meaningful and diverse sample generation. Our method features Dual-Space Clustering to construct compact anchors and Relation Preservation Finetuning to enhance generation quality with minimal adaptation. Experiments show that CADD achieves state-of-the-art performance in dataset distillation, particularly excelling in scalability and sample diversity. This work opens a new direction for diffusion-based knowledge condensation by focusing on condition signals rather than pixels or latents.

This work investigates the parametric shifts of laterally diffused metal-oxide-semiconductor (LDMOS) devices under electromagnetic pulse (EMP) stress by combining experimental and simulation approaches. Technology computer-aided design (TCAD) simulations reveal that the parametric shifts originate from the generation of interface traps (N-it) and oxide traps (N-ot). Specifically, applying EMP to drain induces hot carrier injection (HCI), where N-it at the interface between shallow trench isolation (STI) and drift region causes threshold voltage shift (Delta V-TH) and increased carrier scattering. Concurrently, applying EMP to gate leads to hole trapping in the STI, which induces mirror charges that reduce the on-state resistance (R-ON). Furthermore, a neural network model is proposed to classify and predict the mode of EMP-induced degradation by utilizing electromagnetic interference (EMI) signals as input. This model achieves a classification accuracy of up to 98%. Consequently, this work provides both theoretical insights and a practical tool for the EMP-tolerant design of LDMOS devices.

Feature compression is increasingly important for improving the efficiency of downstream tasks, especially in applications involving large-scale or multi-modal data. While existing methods typically rely on dedicated models for achieving specific compression ratios, they are often limited in flexibility and generalization. In particular, retraining is necessary when adapting to a new compression ratio. To address this limitation, we propose a novel and flexible Arbitrary Ratio Feature Compression (ARFC) framework, which supports any compression ratio with a single model, eliminating the need for multiple specialized models. At its core, the Arbitrary Ratio Compressor (ARC) is an auto-regressive model that performs compression via next-token prediction. This allows the compression ratio to be controlled at inference simply by adjusting the number of generated tokens. To enhance the quality of the compressed features, two key modules are introduced. The Mixture of Solutions (MoS) module refines the compressed tokens by utilizing multiple compression results (solutions), reducing uncertainty and improving robustness. The Entity Relation Graph Constraint (ERGC) is integrated into the training process to preserve semantic and structural relationships during compression. Extensive experiments on cross-modal retrieval, image classification, and image retrieval tasks across multiple datasets demonstrate that our method consistently outperforms existing approaches at various compression ratios. Notably, in some cases, it even surpasses the performance of the original, uncompressed features. These results validate the effectiveness and versatility of ARFC for practical, resource-constrained scenarios.

In recent years, the development of burst imaging technology has improved the capture and processing capabilities of visual data, enabling a wide range of applications. However, the redundancy in burst images leads to the increased storage and transmission demands, as well as reduced efficiency of downstream tasks. To address this, we propose a new task of Burst Image Quality Assessment (BuIQA), to evaluate the task-driven quality of each frame within a burst sequence, providing reasonable cues for burst image selection. Specifically, we establish the first benchmark dataset for BuIQA, consisting of 7,346 burst sequences with 45,827 images and 191,572 annotated quality scores for multiple downstream scenarios. Inspired by the data analysis, a unified BuIQA framework is proposed to achieve an efficient adaption for BuIQA under diverse downstream scenarios. Specifically, a task-driven prompt generation network is developed with heterogeneous knowledge distillation, to learn the priors of the downstream task. Then, the task-aware quality assessment network is introduced to assess the burst image quality based on the task prompt. Extensive experiments across 10 downstream scenarios demonstrate the impressive BuIQA performance of the proposed approach, outperforming the state-of-the-art. Furthermore, it can achieve 0.33 dB PSNR improvement in the downstream tasks of denoising and super-resolution, by applying our approach to select the high-quality burst frames.

The synergistic effects of the total ionizing dose (TID) and single-event upset (SEU) are investigated in a 0.18-& micro;m double silicon-on-insulator (DSOI) static random access memory (SRAM), and the impacts of top silicon-layer thickness (T-SOI1) and back-gate bias are discussed. Experimental results show that the TID irradiation significantly enhances the SEU cross section; specifically, at LET = 86.1 MeV.cm(2)/mg, a TID of 1000 krad(Si) increases the SEU cross section by a factor of 2.7. Thanks to reduced charge collection, a 60.7% decrease in SEU cross section is observed under Ta-181(35+) irradiation when T-SOI1 is reduced from 65 to 45 nm. Moreover, a negative back-gate bias enhances the radiation hardness of the SRAM, achieving a 71% reduction in the SEU cross section under Ta-181(35+) ion exposure following a TID of 1000 krad(Si). Consequently, an optimized biasing scheme is proposed to balance the trade-offs between radiation hardness and key circuit performance metrics, including access time, area, and power consumption. The underlying physical mechanisms are further elucidated through TCAD and HSPICE simulations.

This paper explores the impact of back-gate bias (V soi ) and supply voltage (V DD ) on the single-event upset （SEU） cross section of 0.18μm configurable silicon-on-insulator static random-access memory （SRAM） under high linear energy transfer heavyion experimentation.The experimental findings demonstrate that applying a negative back-gate bias to NMOS and a positive back-gate bias to PMOS enhances the SEU resistance of SRAM.Specifically,as the back-gate bias for N-type transistors(V nsoi ) decreases from 0 to-10 V,the SEU cross section decreases by 93.23%,whereas an increase in the back-gate bias for P-type transistors (V psoi ) from 0 to 10 V correlates with an 83.7%reduction in SEU cross section.Furthermore,a significant increase in the SEU cross section was observed with increase in supply voltage,as evidenced by a 159%surge at V DD =1.98 V compared with the nominal voltage of 1.8 V.To explore the physical mechanisms underlying these experimental data,we analyzed the dependence of the critical charge of the circuit and the collected charge on the bias voltage by simulating SEUs using technology computer-aided design.

Image restoration tasks like deblurring, denoising, and dehazing usually need distinct models for each degradation type, restricting their generalization in real-world scenarios with mixed or unknown degradations. In this work, we propose Defusion, a novel all-in-one image restoration framework that utilizes visual instruction-guided degradation diffusion. Unlike existing methods that rely on task-specific models or ambiguous text-based priors, Defusion constructs explicit visual instructions that align with the visual degradation patterns. These instructions are grounded by applying degradations to standardized visual elements, capturing intrinsic degradation features while agnostic to image semantics. Defusion then uses these visual instructions to guide a diffusion-based model that operates directly in the degradation space, where it reconstructs high-quality images by denoising the degradation effects with enhanced stability and generalizability. Comprehensive experiments demonstrate that Defusion outperforms state-of-the-art methods across diverse image restoration tasks, including complex and real-world degradations.

With the continuous miniaturization, integration, and stacking of chips, how to effectively dissipate heat at nanoscale has become a pressing challenge. The previous studies toward heat dissipation are only limited to a few materials, and lacking research on practical design and application. In this work, it is found that the novel antiferromagnetic insulator CrOCl can be well applied to the nanoscale heat dissipation, where a high out-of-plane thermal conductivity up to 1 W m-1 K-1, and a high interfacial thermal conductance up to 100 MW m-2 K-1 with SiO2/Si substrate are measured. Moreover, it is found that the thicker channel shows a superior heat-escaping performance, and the thickness proves to be a key factor in the design of high-performance heat dissipation, rather than simply considering the thermal transport properties of the channel. This work provides new insights for the design of the heat-escaping channel by proposing a new heat dissipation material at nanoscale.

We present a novel Task-aware Attentional Dynamic Alignment (TADA) framework for visual-based few-shot video classification (FSVC) that addresses two key challenges in this field: efficiency and nuanced spatio-temporal reasoning. Existing methods are often hindered by computationally expensive video decoding processes and neglect the temporal order of videos. In contrast, our method harnesses compressed domain data to extract rich spatio-temporal cues at a fraction of the cost of traditional video processing methods. Specifically, we propose an embedding module to extract informative features from compressed domain data while minimizing computational overheads. Furthermore, to exploit the temporal order of frames, we develop a prototypical ADA module to align and classify videos with an explicit temporal order constraint. Our framework also incorporates a contextual mixer to enrich video embeddings with task-specific context. Extensive experiments on multiple datasets demonstrate that TADA achieves state-of-the-art performance and outperforms existing methods in accuracy and efficiency.

A novel device integrating all the functions of the three-transistor Dynamic Random Access Memory (3T-DRAM) into one-transistor (1T) layout is demonstrated with 22 nm fully depleted silicon-on-insulator (FDSOI) technology. The 1T layout is realized by the proposed bipolar junction transistor (BJT) assisted in-situ sensing DRAM (BIS-DRAM), in which the erase and program function are conducted through a BJT embedded in the substrate. The charge is stored in the buried oxide (BOX) capacitor of the SOI MOSFET and read out through the interface coupling effect, with the top gate serving as a selector for random access. This smart design enables the non-destructive and in-situ reading with low disturbance and compact layout. Experimental results demonstrate 5 ns write speed and >= 7.9 s retention time, with a minimum write voltage down to 0.2 V, showing great potential for embedded DRAM (eDRAM) applications.

Modern ultraviolet (UV) detection applications require compact, high-performance detectors compatible with mass production. In this study, we present a silicon-on-insulator (SOI) monolithically integrated photodiode (PD)-MOSFET UV detector fabricated via a fully CMOS-compatible process, achieving exceptional responsivity and detectivity. The proposed detector integrates a cross-finger PD with a MOSFET by connecting the PD anode to the MOSFET gate. Thus, the PD detects UV illumination, and subsequently, the signal is amplified by the MOSFET. A systematic investigation of the top-silicon thickness and PD dimensions enables balancing the responsivity and UV selectivity. Under 260 nm illumination at 3 mu W/cm(2), the device attains a responsivity of 2.54x10(6) A/W, an external quantum efficiency (EQE) of 1.21 x10(9) %, and a detectivity of 3.61x10(19) Jones-over a 10(7) -fold improvement compared to a standalone PD. The measured rise and decay times are 11.8 and 29.5 ms, respectively, under 5 mu W/cm(2)illumination. Sentaurus TCAD simulations show that these can be reduced to 0.46 and 0.62 ms through gate dimensions scaling and buried oxide (BOX) thickness modulation. Temperature-dependent measurements reveal the impact of elevated temperatures on device performance. The combination of high performance and CMOS compatibility makes this detector a promising candidate for UV detection applications such as UV imaging and communication.

The core–shell junctionless MOSFET (CS-JL FET) meets the process requirements of FD-SOI technology. The transistor body comprises a heavily doped ultrathin layer (core linking the source and the drain), located underneath an undoped layer (shell). Drain current, transconductance, and capacitance characteristics demonstrate striking performance improvement compared with conventional junctionless MOSFETs. The addition of the shell results in one order of magnitude higher mobility (peak value), transconductance, and drive current. The doping and thickness of the core can be engineered to achieve a positive threshold voltage for normally-off operation. The CS-JL FET is compatible with back-biasing and downscaling schemes. The physical mechanisms are revealed by emphasizing the roles of the main device parameters.