Past studies have underlined the importance of silicon material composition for optimum space solar cells performances. However, the maturity and performances of silicon cells have evolved over the last decades. Due to the increasing space photovoltaic power demand, it becomes crucial to assess modern silicon radiation hardness. Herein, the influence of material composition (resistivity and interstitial oxygen, gallium, and thermal donor concentrations) of modern gallium-doped silicon wafers on their electronic properties after electron irradiation is investigated. Results demonstrate stable majority carrier concentrations and mobilities within the doping ranges and fluences investigated. Regarding the post-irradiation carrier recombinations, the higher the resistivity the higher the carrier lifetime is at low injection level. Similarly, the electron diffusion length is six times higher for the 60 Omega.cm samples compared to the 0.9 Omega.cm ones. The Shockley-Read-Hall recombination signature of a vacancy-related defect (reported in boron-doped silicon) reproduces well this trend. Then, complete heterojunction solar cells are processed from these materials. While highest resistivity samples feature better carrier lifetimes after irradiation, the best conversion efficiencies are obtained for intermediate resistivity samples (15 Omega.cm). It is shown that it is essentially due to the positive effect of higher majority carrier concentration on the open-circuit voltage.

Silicon solar cells are used anew on satellites for low-earth-orbit missions to comply with New Space demand. Studies are thus emerging to evaluate the resilience of modern silicon solar cells technologies towards space environment. In this study, we chose to irradiate 160 mu m-thick silicon heterojunction solar cells to 1 & 3 MeV protons. 1 MeV and 3 MeV protons have a stopping range in Si of 16 mu m and 92 mu m, respectively. These proton irradiations lead to strong carrier removal effect along with carrier lifetime degradation. This study aims to investigate their effects on high resistivity Ga doped (60 a"broken vertical bar.cm) silicon bulk. Highly degraded IV performances are observed at fluences of 1012 cm-2 and beyond, with 3 MeV proton irradiations leading to more dramatic damages. A modeling study confirms the strong majority carrier concentration decrease with local in-plane areas even showing a conductivity type inversion for 1 MeV protons at a fluence of 1012 cm-2. Finally, we highlight the importance of using a bias light for spectral response measurements, as it was required to match the JSC obtained from IV and external quantum efficiency measurements. It thus suggests a high light injection dependence for the recombination activity of the proton irradiation-induced defects.

Antimony (Sb)-doped Czochralski (Cz)-grown silicon (Si) wafers would feature superior performances in comparison with the conventional phosphorus (P)-doped wafers and start to be deployed into mass production. However, published studies about the properties of Sb-doped wafers for solar cells are rather scarce. This work investigates the spatial (i.e., axial and radial) distributions of Sb, interstitial oxygen (Oi) and oxygen thermal donors (TD), in Sb-doped Cz ingots processed with melt recharging (RCz), focusing on wafers representative of the whole RCz cycle. This study confirmed first the interest in Sb-doping for obtaining Si ingots and wafers with a controlled and narrowed resistivity range. Furthermore, the studied wafers featured low as-grown TD concentrations, low enough not to affect the bulk carrier lifetime (tau b). Results also showed that Sb-doping does not significantly influence the TD formation kinetics. Last, the studied wafers featured relatively low Oi concentrations ([Oi]) below 7 x 1017 cm-3 for most samples, with rather flat [Oi] radial profiles. As these Sb-doped samples also presented low Thermal History Index values, they should not be prone to O-related defects-induced tau b degradations during high temperature steps.

Silicon (Si) heterojunction (SHJ) solar cells are today a mature industrial technology allowing the highest efficiency of Si single junction cells. Nevertheless, SHJ efficiency dispersion related to the wafer quality (Si minority carrier lifetime, tau bulk) can be up to 1%abs with the present specification of high quality n-type Cz. Thus, in order to enhance the quality of the wafers, several low-cost annealing processes on as-cut wafers performed under air atmosphere before entering cell line have been tested. Results suggest that multiple factors are involved in the change of tau bulk. At low temperature (< 500 degrees C), all wafers carrier lifetime improved significantly whereas at high temperature (> 700 degrees C) their quality degrades. In the intermediate temperature range, tau bulk evolution seems to depend on the wafer type (supplier and initial quality), probably due to the combined occurrence of concurrent bulk improvement and contamination mechanisms. Best pre-annealing conditions of tested as-cut Cz wafers significantly improve the wafer carrier lifetime and thus the cell efficiency up to +0.8%abs. Nonetheless, further work is needed to foster our comprehension of the mechanisms responsible for the change in tau bulk. Results suggest that behind well-known POCl3 gettering route, low temperature gettering mechanisms might be further investigated in order to setup robust process applicable to the wafers of SHJ mass production.

The space sector is facing significant upheavals, in particular in terms of cost reduction challenges, driven by the emergence of Low Earth Orbit constellations. Concerning solar power generation, it opens up perspectives for alternative solar photovoltaics technologies, instead of the highly performant & expensive III-V multi-junction devices. Crystalline silicon solar cells, which have fueled space developments, spark a renewed interest, thanks to their industrial maturity, high efficiencies on p-type substrates & costs of two to three orders of magnitude lower than those of III-V. In this context, we present here the results of electrons radiation hardness studies on p-type (Ga-doped) silicon heterojunction solar cells. Devices with thicknesses down to 60μm are manufactured and then characterized before and after 1MeV electrons irradiations. The best ultra-thin heterojunction cell shows an end-of-life (1.5×1014 e/cm2) externally certified efficiency of 15.1% under AM1.5G at room temperature; this translates into ~ 13.4% with AM0 spectrum. The benefits of thickness reduction with respect to radiation hardness are presented, and the cells improvement pathways discussed.

With their low price, availability in large volumes and increasing performances, the re-assessment of the potential of modern silicon-based solar cell technologies for space applications becomes more and more relevant. Among these technologies, silicon Heterojunction solar cells processed from Ga-doped wafers hold the record efficiency among all p-type based single junction devices, with 26.6% recently demonstrated. Such a high efficiency potential, combined with a p-type base doping (expected to confer better radiation hardnesses) and the compatibility of the Heterojunction technology with very thin wafers, make such cells particularly promising for space applications. In this work, a comprehensive experimental plan, spanning various wafer thicknesses, resistivity values and characterization techniques, was implemented to probe the electron radiation hardness of Ga-doped silicon Heterojunction solar cells and precursors. The work presented here focuses more precisely on the dependence on the fluence of end-of-life IV performances of cells made from wafers with resistivity values up to $60\ \Omega.\text{cm}$ . EQE measurement is used to confirm the trends observed under sun simulator for the short-circuit current and explore the wavelength dependence of the electronic degradations. Based on these results, guidelines for optimum thicknesses, resistivity values and material parameters for these Si solar cells are discussed.

The huge photovoltaic volume required by the growing Low Earth Orbit (LEO) applications call for a re-assessment of alternatives photovoltaic solutions for space. CEA conducts R&D activities on this topic at cells and photovoltaic array (PVA) level, working closely with academic & industry sectors, leveraging on its expertise in terrestrial photovoltaic approaches, while taking into account the specificity of space environment. In this paper, we intend to present key developments and challenges for a silicon passivated contacts photovoltaic array solution, through the different ongoing work programs.

In this work, passivated contacts screen-printed solar cells using ultra-thin (15nm) poly-crystalline silicon (poly-Si) on silicon oxide (SiOx) stacks are fabricated on different n-type monocrystalline silicon (c-Si) wafers. Such advanced passivating contacts are integrated, in combination with TCO (Transparent Conductive Oxide) layers, on both front and rear sides via a simplified fabrication process. Efficiency levels above 22.3% are obtained using this cell concept on c-Si wafers showing resistivity ranges from 0.8 to 12 Omega.cm. High performances can be reached even on wafers featuring high interstitial oxygen levels and/or high metallic impurities concentrations.

Silicon heterojunction (SHJ) solar cells can be formed using n‐type or p‐type silicon wafers. To foster the increasing industrial interest of SHJ, cheaper p‐type wafers with a good availability might be preferred, but until today, they yield lower cell efficiency compared with n‐type and show instabilities in the particular case of boron doping. This work shows that the production flow of high performance rear‐junction bifacial n‐type cells can be applied to front‐junction p‐type cells without process alterations and with a loss of efficiency as low as −0.3%abs provided that the wafer bulk lifetime is high enough. For this, we propose the use of wafers with gallium doping on which we obtained on a semi‐industrial pilot line SHJ p‐type cells mostly stable under moderated heat and light and with an efficiency closed to n‐type references. The best p‐type cell was externally certified at 24.47% total area.

In this work, we derive and discuss the wafer bulk requirements for industrial amorphous/crystalline n-type silicon heterojunction cells. In particular, we investigate in detail the efficiency variations as a function of a) bulk carrier lifetime, b) dark resistivity, as well as c) the ratio of both quantities. To this end, we resort to finite element simulations to calculate how the I(V) parameters vary with the bulk properties listed above. In order to validate the simulation outputs, SHJ cells were processed from several wafer groups specially prepared to span wide ranges of bulk lifetimes and resistivities. Once validated, the simulation results are used to compute the wafer requirements as a function of the targeted efficiency, and the specifications derived therefrom are compared with literature. In this respect, the limits of the bulk lifetime/resistivity ratio, often employed to discuss wafer specifications, are highlighted. Combining the established requirements with statistical data from mass production of Czochralski ingots, we then assess whether or not nowadays commercially available monocrystalline wafers allow for a stable production of high efficiency devices. From a wafer manufacturer's standpoint, we quantify for a fixed cell structure, the room for efficiency improvement expected with further progresses in wafer bulk properties. Last, we also provide an outlook on how wafer requirements shall evolve with cell efficiency up to 25%.

This paper reports on the first months of operation of the silicon heterojunction production line at Enel Green Power which started in April 2019 as well as strategies for efficiency improvement. The efficiency of the lines reached in short time is demonstrated in its current configuration with 4BB cell design. Within the collaboration with CEA, an intense activity is ongoing to increase the module efficiency. For the time being, it has been demonstrated a new European HJT cell record certified at 24.63% on a full M2 wafer.

Combination of silicon heterojunction cell technology (SHJ) with bifacial module architecture is an appealing solution for manufactures who are focused on PV system performances. In this paper, we will present a study with an industrial perspective, initiated to address specific challenges of producing SHJ cells and modules in Europe. The impact of incoming wafer quality has been studied by analyzing at full ingot scale the efficiency performances of SHJ cells. The impact of long queue time prior to deposition is also reported. Finally, results of full size modules with 72 cells are presented.

It is generally taken for granted that the bulk minority carrier lifetime in uncompensated phosphorus-doped silicon (Si) wafers is stable under illumination. In contradiction with this long-time belief, we report on a fast and significant lifetime degradation under light soaking for Czochralski wafers sampled from the top ingot end. We demonstrate that defect formation also proceeds during carrier injection by forward biasing Si heterojunction solar cells made from such wafers, suggesting a carrier-induced degradation rather than merely light-induced. The involved bulk defect is shown to preferentially form at the wafer center, where double Thermal Donors are in high concentration. The role of Thermal Donors is investigated further and the obtained preliminary results support their involvement in the reported carrier-induced degradation.

In a highly competitive PV market, reducing the production costs while maintaining high cell and module efficiencies is mandatory to remain attractive. In this context, reducing the silicon wafer thickness appears as a very promising approach as wafer production costs contributes for nearly 25% of the final price of the module. Furthermore, the mass-production availability of high-performance thin PV cells would be in-line with the growing demand for specific flexible or ultra-light module applications (space, aeronautics, BIPV...etc). Previous work [1] already demonstrated the industrial compatibility of thin wafers (240cm2, 80160μm thick range) with the heterojunction (SHJ) technology [2]. Cell integration was performed on CEAINES Industrial LabFab pilot line [3]. High efficiencies, similar to the 160μm wafer thick references, were demonstrated for cells down to 90μm and first mini-modules with wafers down to 80μm were fabricated. Following these promising first results and learnings, we continuously ameliorated our production line to improve both thin cell efficiencies and breakage rate. In figure 1, typical impact of wafer thickness reduction on cell efficiency is presented for a four busbar (4BB) bifacial SHJ configuration. Compared to results presented in [1], efficiencies obtained have significantly been improved for all thicknesses considered. However, some efficiency loss is also now systematically observed when reducing the wafer thickness. Indeed, rencent cell process improvements have translated in improved cell's Voc output. The Jsc current losses related to the substrate thinning can thus no longer be compensated by a sufficient simultaneous Voc increase. Record cells obtained on such thin wafer remain nevertheless very promising, with 22.1% and 21.8% efficiency measured respectively on 115μm and 95μm 4BB SHJ bifacial devices. Breakage rate has also been greatly improved, with an overall non quality (TNQ) < 5% for production of 100μm thick wafers, but remains significantly higher in the 70-90μm range (TNQ >15%) where production automation adjustments are necessary. Nevertheless, ultimate wafer thicknesses batches (40-70μm) have been run to identify the actual limits of our production line. Despite critical breakage rate values (TNQ >30%) for such ultra-thin wafers, we were able to finalize and measure a significant amount of very thin wafer (60μm) and even bring some ultra-thin wafers (40μm) up to the final IV tester (efficiency >18.5% obtained on a 41μm thick 4BB bifacial SHJ cell). Finally, thanks to the previous mini-module learnings, two 60 cells modules have been fabricated, using standard glass, encapsulant and lamination process. A set of 93μm record SHJ cells has thus been integrated in a 60 cell glass/backsheet module configuration, leading to a very promising final module output power of 313Wc (CTM of 99.1%, no specific breakage observed after PL inspection) demonstrating the full compatibility of thin wafers with current module configuration.

CHEETAH is an FP7 integrated research project on photovoltaics funded by the European Commission and was initiated by EERA PV. This project is structured into two type of activities: Coordinative and Support actions (CSA) and Joint Research activities (JRA). The CSA focuses on the creation of a long term collaborative platform by developing tools for knowledge sharing, e-learning platforms for training and education, mobility between researchers, efficient use of infrastructures and promoting best practices and standards. The JRA focuses on developing new concepts and technologies for wafer-based crystalline silicon PV (modules with thin cells alt; 100 micron), thin-film PV (advanced light management) and organic PV (very low-cost barriers), resulting in reduced cost of environmentally benign/abundant/non-toxic materials and increased module performance. This paper gives a summary of the main achievements of this project for the two categories of activities.

We have studied the conversion of thin film photovoltaic factory to Silicon Heterojunction (SHJ) technology adapting thin film PECVD reactors for deposition of passivation layers. In the transition from thin film to SHJ cells, it is crucial to study the impact of defectiveness on cell efficiency due to several factors such as transportation and handling of wafers. By performing photoluminescence maps and particle contamination analysis on the surface of wafers and cells different defectiveness sources have been studied. Once the sources of defects have been identified, we elaborated solutions to mitigate effects and we were able to increase the efficiency of SHJ solar cells by an absolute gain of 4.3%.

A significant fraction of Czochralski (Cz) Silicon (Si) wafers suffer from oxygen-related bulk quality issues. The detection of such wafers in the as-cut state during incoming inspection has become a topic of attention as higher efficiency solar cell structures are developing. However such detection - for instance using photoluminescence images – has not yet proven successful due to a high risk of detection errors Shih et al. (2015) [1]. In this work, we tentatively introduce a material quality indicator referred to as “Thermal History Index” (THI) and investigate its ability, in conjunction with the interstitial oxygen concentration ([Oi]), to allow a better identification of low bulk quality wafers.