Cooperation on a large scale between dynamic networked companies has become possible owing to the widespread usage of the Internet, the adoption of standards and the increased information exchange capabilities (bandwidth) of the network. This chapter documents a completely decentralized approach to cooperation (task scheduling) in which every enterprise entity manages its own activities and uses the information channel that has been made available to improve synchronization with others.

This chapter compares the current evolution towards dynamic networked organisations with the important enterprise and technology related changes that occurred in the last century. Clear advantages of this new organisational format, based on findings made in research projects and experiences from early adopters, have been illustrated.

This paper describes how the use of a short soft Ar sputter etch done on the top of the dielectric film of a metal-insulator-metal (MIM) capacitor improves the quality of this film. It was observed that the insulator film as deposited has higher leakage currents and shows early failures during breakdown measurements, while significant lower leakage and tighter breakdown distributions are obtained when a sputter etch is included. However TXRF and SIMS analysis did not reveal any contamination, it is believed that the top few nanometers of the film are of poor quality, and in this way degrade the performance of the capacitor. RF circuits designed in bipolar or BiCMOS technologies require integrated capacitors with high quality factor. This implies that these capacitors should exhibit extremely low dielectric loss combined with minimal series resistance and parasitic capacitance, excellent capacitor matching and linearity. Moreover they should meet the necessary reliability requirements and be processed with low defectivity. Metal-insulator- metal (MIM) capacitors have proven to be the optimal solution. They demonstrate low parasitic capacitance, especially when fabricated at a higher metal level, low series resistance and the required matching and linearity performance, thanks to the absence of v oltage induced depletion, as observed in poly-insulator-poly capacitors. The data reported here is based on MIM capacitors that have been integrated in a 0.35 µm-BiCMOS technology (1). They aim at a capacitance per unit area of 1.0 or 1.5 fF/µm², an increase that can be achieved by reducing the dielectric thickness. The bottom plate of the capacitor is making use of a regular metal layer, which also serves as metal interconnect layer. A PECVD nitride with a thickness of about 60 (1.0 fF/µm²) or 40 nm (1. 5 fF/µm²) has been chosen as dielectric, because of its higher dielectric constant, which allows to scale down the capacitors (2),(3),(4). A thin TiN/AlCu/TiN stack acts as top plate, which is patterned first with a selective etch chemistry that stops in the dielectric. After etching the top plate and stripping the remaining photoresist, the bottom plate is patterned, together with the interconnect at this level. Once the complete capacitor is formed an intermetal dielectric is deposited and planarized. The top plate of the capacitor is connected through the subsequent via to the next metal (See figure 1). In this way the MIM capacitor module can be integrated at each metal level, except the top metal level.