A stochastic model for characterizing the conversion gain of Active Pixel Complementary metal–oxide–semiconductor (CMOS) image sensors (APS), assuming stationary conditions was recently presented in this journal. In this study, we extend the stochastic approach to non-stationary conditions. Non-stationary conditions occur in gated imaging applications. This new stochastic model, which is based on fundamental physical considerations, enlightens us with new insights into gated CMOS imaging, regardless of the sensor. The Signal-to-Noise Ratio (SNR) is simulated, allowing optimized performance. The conversion gain should be determined under stationary conditions.

A stochastic model for characterizing the conversion gain of Active Pixel Complementary metal–oxide–semiconductor (CMOS) image sensors (APS) with at least four transistors is presented. This model, based on the fundamental principles of electronic noise, may provide a reliable calibration of the gain conversion, which is one of the most important parameters of CMOS Image Sensor pixels. The new model revisits the “gold standard” ratio method of the measured variance of the shot noise to the mean value. The model assumes that shot noise is the dominant noise source of the pixel. The microscopic random time-dependent voltage of any shot noise electron charging the junction capacitance C of the sensing node may have either an exponential form or a step form. In the former case, a factor of 1/2 appears in the variance to the mean value, namely, q/2C is obtained. In the latter case, the well-established ratio q/C remains, where q is the electron charge. This correction factor affects the parameters that are based on the conversion gain, such as quantum efficiency and noise. The model has been successfully tested for advanced image sensors with six transistors fabricated in a commercial FAB, applying a CMOS 180 nm technology node with four metals. The stochastic modeling is corroborated by measurements of the quantum efficiency and simulations with advanced software (Lumerical).

This paper is a review of 1/f noise in state-of-the-art advanced MOSFETs, where the channel length has deep submicron or nano-scale dimensions. The origin of 1/f noise, models of 1/f noise, and ways of measuring 1/f noise are briefly reviewed.

A detailed time-domain analysis of noise due to thermal, 1/f and shot noise sources in CMOS active pixel sensors (APS) based on 3T and 4T pixel design is performed. We suggest that the conventional noise analysis based on the frequency domain, usually used for noise calculations of APS’s cannot be strictly applied, because the switched APS circuitry under study cannot be represented as a linear time-invariant system. To calculate explicit noise expressions for noise performance we, therefore, resort to time-dependent circuit models and perform time-domain noise analysis, taking into account the stationary nature of the various noise processes. To accomplish that, we divide the operation cycle of APS to separate time phases, and in these periods of time the relevant circuits can be modeled as linear time-invariant systems represented by simple (time-domain) impulse response functions. Finally, we present and compare between the noise simulation and noise measurement results for both 3T and 4T pixels. The excellent correspondence between the analytic expressions and the measured results corroborate the validity of the theoretical results.

The model presented here is an extension of the carrier trapping-detrapping model for 1f noise, in semiconductor devices with interfaces formed by oxide or insulating layers. The validity of the conventional assumptions, currently used to explain trapping-detrapping 1f noise, is discussed and a revised set of assumptions is proposed. It is shown that 1f noise that is caused by electron trapping and detrapping at oxide interfaces, can be explained for a wide variety of activation barrier distributions, assuming the revised set of assumptions.

A novel piezoelectric thin-film accelerometer has been designed and its performance has been analysed. The piezoelectric thin film (PZT for example) is delineated into an array of pads to reduce the sensor capacitance. By filling the cavity around the PZT pads either with a polymer or a gas with controlled pressure, damping can be controlled. The piezoelectric thin-film material (i.e., pads) is clamped between a seismic mass and a base plate (silicon substrate). During acceleration in the axial direction the seismic mass exerts a force on the piezoelectric layer, resulting in the generation of a charge due to the piezoelectric effect. The induced charge is independent of the dimensions of the piezoelectric layer and hence of its tolerances.The generated charge is directly sensed by a charge-sensitive preamplifier that is implemented by CMOS technology on a tiny silicon chip. In principle, the proposed thin-film accelerometer can be integrated with the electronic readout and can be extended into an array of accelerometers. The dynamic response is presented and the trade-offs between several design considerations are discussed. For a specific design, a sensor sensitivity of 320 mV g−1 and lower and upper cut-off frequencies of, respectively, 1 Hz and compensation for temperature and pyroelectric effects. In addition, self-test features based on the application of electrostatic forces are feasible but require more sophisticated signal processing.