This article reports an FPGA-based P4-enabled Smart NIC solution which is designed and implemented for web-scale cloud and to meet 5G/beyond 5G networking requirements. The P4-enabled Smart NIC solution leverages the open standards, platforms and software-defined approaches, responds to the real time Data Centre Networking service requests, in particularly, enables the end-to-end network slicing, which is one of the critical requirements of a multi-tenancy 5G network. We discussed the possibilities and challenges of P4 specification implementation in the FPGA to realise the Smart NIC functionalities. And after that, we showed its data plane programmability and flexibility with P4 features. Furthermore, we demonstrated its application scenario in an 5G environment mainly focusing on edge Data Centre to core Data Centre network slicing. The setup interconnects the P4-enabled Smart NIC with optical Bandwidth Variable Transponders, and the system offers agile 100 Gbps interface to transport the packets through P4-defined data plane for L2/L3/L4 parsing and action. The P4-enabled Smart NIC can change the data plane pipelines in seconds, and it can achieve maximum 84.8 Gbps throughput. With P4 programmed hardware offloaded Segment Routing can produce 30% more bandwidth than without.

This study focuses on the provisioning of resilient Cloud Radio Access Network (C-RAN) services employing optical transport networks. In response to the high bandwidth requirements necessary for the protection of the C-RAN architecture from optical transport network and/or BBU failures, a novel approach based on Network Coding (NC) is proposed. A novel architectural and hardware framework to enable NC are also provided and a suitable implementation addressing the problem of fast NC-related operations processing at the edge is demonstrated. A global time stamping solution that can be used to address the strict synchronization requirements of FH flows arriving at the BBUs, keeping buffering at the edge as low as possible, has been developed. The performance of the proposed solution has been experimentally evaluated demonstrating negligible penalties. Network level modeling results demonstrate a reduction of the total optical network capacity required for this type of applications by 33%.

This paper presents the role of optical transport networks in 5G, as an enabler of Enhanced Mobile Broadband, Ultra-Low Latency Reliable and Massive Machine to Machine services in vertical industries. Energy efficiency gains are quantified.

The time shared optical network (TSON) has been proposed as a dynamic optical transport network solution to provide high bandwidth and low latency connectivity in support of 5G technology and beyond. This work reviews the TSON evolution stages developed in the framework of the U.K. national project Towards Ultimate Convergence of All Networks (TOUCAN). The details of the TSON architecture and its various development phases are discussed, and the performance of its latest implementation is evaluated through relevant demonstration activities across the Smart Internet Lab’s 5G (5GUK) test network.

The increased carrier bandwidth and the number of antenna elements expected in 5G networks require a redesign of the traditional IP-based backhaul and CPRI-based fronthaul interfaces used in 4G networks. We envision future mobile networks to encompass these legacy interfaces together with novel 5G RAN functional splits. In this scenario, a consistent transport network architecture able to jointly support backhaul and 4G/5G fronthaul interfaces is of paramount importance. In this article we present 5G-XHaul, a novel transport network architecture featuring wireless and optical technologies and a multi-technology software defined control plane, which is able to jointly support backhaul and fronthaul services. We have deployed and validated the 5G-XHaul architecture in a city-wide testbed in Bristol.

We demonstrate a programmable disaggregated edge node in support of both metro and long-haul networks. This solution is successfully evaluated through Bristol's City Metro Network, over 100km and 200km optical fibre with a low power penalty.

For the first time, we demonstrate a 5G network orchestration system supporting low latency and high bandwidth virtual network services over a flexible time slotted optical transport network.

In the present communication we review recent advances in o-band silicon photonics transceivers and wavelength routers and demonstrate their potential application in board-level and rack level interconnection for edge and disaggregated data centers.

Virtual data center (VDC) solutions provide an environment that is able to quickly scale up, and where virtual machines and network resources can be quickly added on-demand through self-service procedures. VDC providers must support multiple simultaneous tenants with isolated networks on the same physical substrate. The provider must make efficient use of its available physical resources while providing high-bandwidth and low-latency connections to tenants with a variety of VDC configurations. This paper utilizes state-of-the-art optical network elements to provide high-bandwidth optical interconnections and develop a VDC architecture to slice the network and the compute resources dynamically, to efficiently divide the physical network between tenants. We present a data center virtualization architecture with a softwaredefined networking controlled all-optical data plane combining optical circuit switching and a time-shared optical network. Developed network orchestration dynamically translates and provisions VDCs requests onto the optical physical layer. The experimental results show the provisioned bandwidth can be varied by adjusting the number of time slots allocated in the time-division multiplexing (TDM) network. These results lead to recommendations for provisioning TDM connections with different performance characteristics. Moreover, application-level optical switch reconfiguration time is also evaluated to fully understand the impact on application performance in VDC provision. The experimental demonstration confirmed that the developed VDC approach introduces negligible delay and complexity on the network side.

We demonstrate a dynamic frame-based optical network in support of a 5G transport supporting both Backhaul and Fronthaul functionalities exploiting FPGA-based real-time optical active technologies. This solution is successfully evaluated over a city field trial with <;1dB power penalty.

We experimentally demonstrate that 5G network stringent delay and bandwidth requirements can be satisfied adopting a novel optical network architecture, utilising flexible optical time slot switching, programmable optical interfaces and VCSEL-based WDM technologies, in a city-based field trial.

We experimentally demonstrate that 5G network stringent delay and bandwidth requirements can be satisfied adopting a novel optical network architecture, utilising flexible optical time slot switching, programmable optical interfaces and VCSEL-based WDM technologies, in a city-based field trial.

Edge Data Centres (EDC) are often managed by a single administrative entity with logically centralized control. The architectural split of control and data planes and the new control plane abstractions have been touted as Software-Defined Networking (SDN), where the OpenFlow protocol is one common choice for the standardized programmatic interface to data plane devices. However, in the design of an SDN architecture, there is no clear distinction between functional network parts such as core and edge elements. It means that all switches require to support lookups over hundreds of bits with complex actions that have to be specified by multiple tables. In this paper, we propose a new programmable architecture for EDC networks, named Residues Defined Networks (RDN). In RDN, a controller defines a network policy (e.g. connectivity protection) setting flow entries at the edges. Based on these entries, the edge switches assign routeIDs to flows. A route is defined as the remainder of the division (Residue) between a route-ID and a set of switch-IDs within RDN core. In case of failures, emergency routes are compactly encoded as programmable residues forwarding paths written into the packets. RDN scalability is evaluated considering 2-tier Clos topologies which cover mostly EDC deployments supporting up to 2304 servers. A RDN proof-of-concept prototype is implemented in Mininet for network emulation. Also, to increase the accuracy on latency measures, we implement RDN in NetFPGA that is validated in a testbed with 10Gbps Ethernet boards. RDN offers ultra-fast failure recovery (sub-milliseconds carrier grade), achieves low latency with RDN switching time per hop (≈0.6μs) and no jitter within the RDN core.

We demonstrate a 26 Gbaud real-time quick-reconfigurable 16QAM/QPSK-adaptable transmitter. The modulation format can be switched in less than a second by an RMAT agent. The FPGA-driven reconfigurable transmitter can work as a generic edge-node interface for traffic aggregation.

We present a Data Centre Virtualisation architecture with an SDN-controlled all-optical data plane combining OCS and TSON. Orchestration dynamically translates and provisions Virtual Data Centres requests onto the optical layer. We describe an implementation and characterisation of the data plane.

ZYNQ devices combine a dual-core ARM Cortex A9 processor and a FPGA fabric in the same die and in different power domains. In this paper we investigate the run-time power scaling capabilities of these devices using of-the-shelf boards and proposed accurate and fine-grained power control and monitoring techniques. The experimental results show that both software and hardware methods are possible and the right selection can yield different results in terms of control and monitoring speeds, accuracy of measurement, power consumption, and area overhead. The results also demonstrate that significant power margins are available in the FPGA device with different voltage configurations possible. This can be used to complement traditional voltage scaling techniques applied to the processor domain to obtain hybrid energy proportional computing platforms.

The ability of scaling power and performance at run-time enables the creation of computing systems in which energy is consumed in proportion of the work to be done and the time available to do it. These systems favour active energy-efficient states in which useful computation is performed at low energy instead of using inactive energy savings modes that incur large latency and energy penalties to enter and exit modes in which the system is halted. This is particular useful in servers that spend most of their time at around 30% utilisation and are rarely fully idle or at maximum utilisation. A feature of an energy proportional computing system is that it must exhibit a wide dynamic range with multiple levels of energy and performance available. In this context, this study investigates how these levels can be obtained in commercially available state-of-the-art 28 nm field-programmable gate arrays (FPGAs) and characterises its benefits. Adaptive voltage and frequency scaling is employed to deliver proportional performance and power in these FPGA devices. The results reveal that the available voltage and frequency margins create a large number of performance and energy states with scaling possible at run-time with low overheads. Power savings of up to 64.98% are possible maintaining the original performance at a lower voltage.

This paper presents a novel routing algorithm called eXtended Torus routing algorithm for networks-on-chip (XTRANC) which supports topologyies based on a variable number and size of inner-torus building blocks. The inner-tori partition a traditional mesh network into an arbitrary number of sub-networks to increase the mesh performance. The sub-networks can generate non-regular global topologies which are also supported by the XTRANC algorithm. XTRANC is especially suitable for dynamically reconfigurable networks mapped to commercial FPGAs in which additional links are added to the mesh topology at run-time to reduce congestion depending on application behaviour and resource availability. XTRANC allows the insertion of links as requested by different parts of the application without centralized control and this research shows that despite this dynamic behaviour the routing algorithm remains deadlock free.