Dynamic digital timing analysis is a less accurate but fast alternative to highly accurate but slow analog simulations of digital circuits. It relies on gate delay models, which allow the determination of input-to-output delays of a gate on a per-transition basis. Accurate delay models for multi-input gates must also consider delay variations induced by multi-input switching (MIS) effects, however. Starting out from an existing MIS-aware first-order hybrid delay model for CMOS two-input NOR gate, we show how to augment it by a first-order interconnect, and develop a similar hybrid delay model for Muller C gates as well. Moreover, we conduct a systematic evaluation of the resulting modeling accuracy: Using SPICE simulations, we quantify the MIS effects on the gate delays under various wire lengths, load capacitances, and input strengths for two different CMOS technologies, comparing these results to the predictions of appropriately parametrized versions of our new gate delay models. Overall, our experimental results reveal that they capture all MIS effects with a surprisingly good accuracy, despite being first-order only.

Simulation-based dynamic timing analysis of digital integrated circuits (DDTA) offers a faster alternative to traditional analog SPICE simulations. To achieve timing predictions that are reasonably competitive in terms of accuracy, however, DDTA mandates gate delay models that go beyond the standard pure or inertial delay models used in state-of-the-art tools. Recent advances in analytic gate delay models, which now also capture effects like drafting and multi-input switching, unlock new possibilities for timing analysis, which go way beyond simulation-based approaches towards an exhaustive exploration. In this paper, we present the cornerstones of a novel symbolic execution framework, which utilizes such analytic delay models for automatically computing symbolic delay expressions for all paths in a digital circuit, for some given ordering of the input transitions. To reduce combinatorial explosion, we introduce symbolic pruning methods that also enable path-sensitive, goal-driven reasoning about timing properties and analytic optimization of specific circuit paths.

We present a prototype multi-input gate extension of the publicly available Involution Tool for accurate digital timing simulation and power analysis of integrated circuits introduced by Oehlinger et al. (Integration, 2021). Relying on discrete event simulation, the Involution Tool allows fast timing simulation of circuits made up of an arbitrary composition of supported gates, provides automatic random input stimulus generation, and supports parameter sweeping. It also enables a detailed comparison of the delay predictions obtained by different models, including pure and inertial delays as well as digitized SPICE-generated reference traces. Our extension added support for 2-input gates like NOR and NAND, by implementing novel analytic delay formulas obtained via a refined analysis of a recently proposed thresholded first-order hybrid model of such gates. The resulting formulas faithfully cover not only multi-input switching effects (also known as Charlie effects), but also the decay of short pulses (aka Drafting effects). Besides the fact that our analytic models not only allow the derivation of closed-form delay formulas for arbitrary compositions of such gates, they are also key for a strikingly simple procedure for model parametrization, i.e., for gate characterization, which only needs three characteristic delay values. Using the extended Involution Tool, we compare the delay and power predictions for some benchmarking circuits stimulated by randomly generated input traces. Overall, our results reveal considerably improved prediction accuracy compared to the original Involution Tool, without a noticeable performance penalty.

We propose a novel approach to symbolic timing analysis for digital integrated circuits based on recently developed analytic delay formulas for 2-input NOR, NAND, and Muller-C gates by Ferdowsi et al. (NAHS 2025). Given a fixed order of the transitions of all input and internal signals of a circuit, our framework computes closed-form analytic delay expressions for all the internal signal transition times that depend on (i) the symbolic transition times of the relevant input signals and (ii) the model parameters of the relevant gates. The resulting formulas facilitate per-transition timing analysis without any simulation, by instantiating the symbolic input transition times and the gate parameters. More importantly, however, they also enable an analytic study of the dependencies of certain timing properties on input signals and gate parameters. For instance, differentiating a symbolic delay expression with respect to a gate parameter or input transition time enables sensitivity analysis. As a proof of concept, we implement our approach using the computer algebra system SageMath and apply it to the NOR-gate version of the c17 slack benchmark circuit.

Thresholded hybrid systems are restricted dynamical systems, where the current mode, and hence the ODE system describing its behavior, is solely determined by externally supplied digital input signals and where the only output signals are digital ones generated by comparing an internal state variable to a threshold value. An attractive feature of such systems is easy composition, which is facilitated by their purely digital interface. A particularly promising application domain of thresholded hybrid systems is digital integrated circuits: Modern digital circuit design considers them as a composition of Millions and even Billions of elementary logic gates, like inverters, OR and AND. Since every such logic gate is eventually implemented as an electronic circuit, however, which exhibits a behavior that is governed by some ODE system, thresholded hybrid systems are ideally suited for making the transition from the analog to the digital world rigorous. In this paper, we prove that the mapping from digital input signals to digital output signals is continuous for a large class of thresholded hybrid systems. Moreover, we show that, under some mild conditions regarding causality, this continuity also continues to hold for arbitrary compositions, which in turn guarantees that the composition faithfully captures the analog reality. By applying our generic results to some recently developed thresholded hybrid gate models, both for single-input single-output gates like inverters and for a two-input CMOS NOR gate, we show that they are continuous. Moreover, we provide a novel thresholded hybrid model for the two-input NOR gate, which is not only continuous but also, unlike the existing one, faithfully models all multi-input switching effects.

Background: This paper introduces an enhanced multi-period p-mobile hub location model that accounts for critical factors such as service time, flow processing delays, and congestion impacts at capacity-constrained hubs. As (urban) transportation networks evolve, mobile hubs play an increasingly vital role in promoting sustainable logistics solutions and addressing complex operational challenges. By enabling the repositioning of hubs across periods, this model seeks to minimize overall costs, particularly in response to dynamic demand fluctuations. Method: To solve this problem, we propose a bi-objective optimization model and introduce a hybrid meta-heuristic algorithm tailored to this application. The algorithm involves a clustering-based technique for evaluating solutions and a refined genetic approach for producing new sets of solutions. Results: Various experiments have been conducted on the Australian Post dataset to evaluate the proposed method. The results have been compared with Multiple-Objecti-ve Particle Swarm Optimization (MOPSO) and Non-Domi-nated Sorting Genetic Algorithm (NSGA-II) using several performance evaluation metrics. Conclusions: The results indicate that the proposed algorithm can provide remarkably better Pareto sets than the other competitive algorithms.

This paper presents an approach to community detection in complex networks by simultaneously incorporating a connectivity-based metric and Max-Min Modularity. By leveraging the connectivity-based metric and employing a heuristic algorithm, we develop a novel complementary graph for the Max-Min Modularity that enhances its effectiveness. We formulate community detection as an integer programming problem of an equivalent yet more compact counterpart model of the revised Max-Min Modularity maximization problem. Using a row generation technique alongside the heuristic approach, we then provide a hybrid procedure for near-optimally solving the model and discovering high-quality communities. Through a series of experiments, we demonstrate the success of our algorithm, showcasing its efficiency in detecting communities, particularly in extensive networks.

To facilitate the analysis of timing relations between individual transitions in a signal trace, dynamic digital timing analysis offers a less accurate but much faster alternative to analog simulations of digital circuits. It primarily requires gate delay models, which account for the fact that the input-to-output delay of a particular input transition also depends on the temporal distance to the previous output transitions. In the case of multi-input gates, this delay also experiences variations caused by multi-input switching (MIS) effects, i.e., transitions at different inputs that occur in close temporal proximity. In this paper, we advocate the development of hybrid delay models for CMOS gates obtained by replacing transistors with time-variant resistors. We exemplify our approach by applying it to a NOR gate (and, hence, to the dual NAND gate) and a Muller C gate. We analytically solve the resulting first-order differential equations with non-constant coefficients and derive analytic expressions for the resulting MIS gate delays. The resulting formulas not only pave the way to a sound model parametrization procedure but are also instrumental in implementing a fast and efficient digital timing simulation. By comparison with analog simulation data, we show that our models faithfully represent all relevant MIS effects. Using an implementation in the Involution Tool, we also demonstrate that our models surpass all alternative digital delay models known to us in terms of accuracy, with comparably short running times.

This paper delves into the realm of community detection in network science and graph theory with the overarching objective of unraveling the underlying structures between nodes within a network.In this pursuit, we put forth a novel and comprehensive approach to ascertain the optimal solution to maximizing the renowned community quality metric known as Max-Min Modularity.Through a series of experiments encompassing diverse case studies, we substantiate the efficacy and validity of our proposed approach, further bolstering its credibility.

Thresholded mode-switched ODEs are restricted dynamical systems that switch ODEs depending on digital input signals only, and produce a digital output signal by thresholding some internal signal. Such systems arise in recent digital circuit delay models, where the analog signals within a gate are governed by ODEs that change depending on the digital inputs. We prove the continuity of the mapping from digital input signals to digital output signals for a large class of thresholded mode-switched ODEs. This continuity property is known to be instrumental for ensuring the faithfulness of the model w.r.t. propagating short pulses. We apply our result to several instances of such digital delay models, thereby proving them to be faithful.

Dynamic digital timing analysis aims at substituting highly accurate but slow analog simulations of digital circuits with less accurate but fast digital approaches to facilitate tracing timing relations between individual transitions in a signal trace. This primarily requires gate delay models, where the input-to-output delay of a transition also depends on the signal history. We focus on a recently proposed hybrid delay model for CMOS multi-input gates, exemplified by a 2-input NOR gate, which is the only delay model known to us that faithfully captures both single-input switching (SIS) and multi-input switching (MIS) effects, also known as “Charlie effects”. Despite its simplicity as a first-order model, simulations have revealed that suitably parametrized versions of the model predict the actual delays of NOR gates accurately. However, the approach considers isolated gates without their interconnect. In this work, we augment the existing model and its theoretical analysis by a first-order interconnect, and conduct a systematic evaluation of the resulting modeling accuracy: Using SPICE simulations, we study both SIS and MIS effects on the overall delay of NOR gates under variation of input driving strength, wire length, load capacitance and CMOS technology, and compare it to the predictions of appropriately parametrized versions of our model. Overall, our results reveal a surprisingly good accuracy of our fast delay model.

One of the recent challenging but vital tasks in graph theory and network analysis, especially when dealing with graphs equipped with a set of nodal attributes, is to discover subgraphs consisting of highly interacting nodes with respect to the number of edges and the attributes' similarities. This paper proposes an approach based on integer programming modeling and the graph neural network message-passing manner for efficiently extracting these subgraphs. The experiments illustrate the proposed method's privilege over some alternative algorithms known so far, utilizing several well-known instances.

In order to facilitate the analysis of timing relations between individual transitions in a signal trace, dynamic digital timing analysis offers a less accurate but much faster alternative to analog simulations of digital circuits. This primarily requires gate delay models that also account for the fact that the input-to-output delay of a particular input transition also depends on the temporal distance to the previous output transitions. In the case of multi-input gates, the delay also experiences variations caused by multi-input switching (MIS) effects, i.e., transitions at different inputs that occur in close temporal proximity. In this paper, we advocate the development of hybrid delay models for CMOS gates obtained by replacing transistors with time-variant resistors. We exemplify our approach by applying it to a NOR gate (and, hence, to the dual NAND gate) and a Muller C gate. We analytically solve the resulting first-order differential equations with non-constant-coefficients, and derive analytic expressions for the resulting MIS gate delays. The resulting formulas not only pave the way to a sound model parametrization procedure, but are also instrumental for implementing fast and efficient digital timing simulation. By comparison with analog simulation data, we show that our models faithfully represent all relevant MIS effects. Using an implementation in the Involution Tool, we demonstrate that our model surpasses the alternative digital delay models for NOR gates known to us in terms of accuracy, with comparably short running times.

In this paper, we introduce a new approach for detecting community structures in networks. The approach is subject to modifying one of the connectivity-based community quality functions based on considering the impact that each community’s most influential node has on the other vertices. Utilizing the proposed quality measure, we devise an algorithm that aims to detect high-quality communities of a given network based on two stages: finding a promising initial solution using a greedy method and then refining the solutions in a local search manner. The algorithm’s performance has been evaluated on various standard real-world networks and artificial graphs. The quality of the results has been reported and compared with those obtained by several state-of-the-art algorithms. As it turns out, the proposed approach is competitive with the other well-known techniques in the literature and significantly outperforms them.

Faithfully representing small delay variations caused by transitions on different inputs in close temporal proximity is a challenging task for digital circuit delay models. In this paper, we show that a simple hybrid model, derived from considering transistors as ideal switches in a simple RC model, leads to a surprisingly accurate model. By analytically solving the resulting ODEs for a NOR gate, explicit expressions for the delay are derived. In addition, we experimentally compare our model's predictions to SPICE simulations and to existing delay models.

Community detection is a fundamental challenge in network science and graph theory that aims to reveal nodes’ structures. While most methods consider Modularity as a community quality measure, Max-Min Modularity improves the accuracy of the measure by penalizing the Modularity quantity when unrelated nodes are in the same community. In this paper, we propose a community detection approach based on linear programming using Max-Min Modularity. The experimental results show that our algorithm has a better performance than the previously known algorithms on some well-known instances.

In this paper, we introduce a new approach for detecting community structures in networks. The approach is subject to modifying one of the connectivity-based community quality functions based on considering the impact that each community’s most influential node has on the other vertices. Utilizing the proposed quality measure, we devise an algorithm that aims to detect high-quality communities of a given network based on two stages: finding a promising initial solution using greedy methods and then refining the solutions in a local search manner. The performance of our algorithm has been evaluated on some standard real-world networks as well as on some artificial networks. The experimental results of the algorithm are reported and compared with several state-of-the-art algorithms. The experiments show that our approach is competitive with the other well-known techniques in the literature and even outperforms them. This approach can be used as a new community detection method in network analysis.

One of the most significant attributes of networks is their community structure. One can define a quality criterion for a community of a network in such a way that a high-quality community refers to a group of vertices that contains more highly-connected edges between its members than between its members and the rest of the network. Various algorithms have been developed to discover communities of networks, although there is not a straightforward solution to see which algorithms are good and how they are good. However, generating synthetic graphs, which are similar to real-world networks and also have a built-in community structure (known community structure), can be used in evaluating accurately different community detection algorithms. This paper presents and programs two very important categories of synthetic networks with known community structures. Afterward, it challenges several well-known community detection algorithms to discover communities in these networks.

In this paper, we use several supervised classification algorithms to predict musical preference of a person. From psychological point of view, although personal emotion is an important feature that has an influence on selecting music, there are some other significant factors such as age, sex, education and district that might have an impact on our musical choices. In this paper, we first collected our data based on an observation method called stratified sampling. In this model, we collected 2000 cases that were grouped into strata (as district in our data feature), then simple random sampling was employed within each stratum. We partitioned our original dataset into two classes, 60% of which we were used to train our models and 40% of which we were held back as a validation dataset. The dataset contains five features as follows: four features named sex, age, education and district as explanatory variables and one feature named music known as response or target variable. The response variable has two different levels, namely traditional and non-traditional so we were dealing with a binary classification. The dataset that we created is called MPD. Moreover, we calculated some important statistical measures such as accuracy, specificity, precision, sensitivity and F-measure. Finally, we examined four different algorithms using R which were a nice mixture of nonlinear (cart, knn) and complex nonlinear methods (rf) and the result in random forest had the highest accuracy with 86.8%. We also observed that the highest F-measure is gained by cart algorithm with 44.7% score. As we have not considered the person's emotion as an influential factor on musical choices, we could expect the accuracy of learning algorithms would not react at very high performance. Our results proved this claim.