In this paper, we discuss pre-transformed RM-Polar codes and cyclic redundancy check (CRC) concatenated pre-transformed RM-Polar codes. The simulation results show that the pre-transformed RM-Polar (256, 128+9) code concatenated with 9-bit CRC can achieve a frame error rate (FER) of 0.001 at Eb/No=1.95dB under the list decoding, which is about 0.05dB from the RCU bound. The pre-transformed RM-Polar (512, 256+9) concatenated with 9-bit CRC can achieve a FER of 0.001 at Eb/No=1.6dB under the list decoding, which is 0.15dB from the RCU bound.

针对脉冲噪声下恒模算法(Constant Modulus Algorithm,CMA)失败的问题,通过分析脉冲噪声的影响,提出了一种基于最小均方(Least Mean Square,LMS)准则的对数型恒模算法(Logarithmic-type CMA,LT-CMA).LT-CMA利用对数函数的非线性变换特性自适应地抑制强脉冲噪声对误差函数的影响,并且利用l2-范数进行信号归一化处理以增强算法的稳健性.仿真结果表明,所提出的LT-CMA可以适应于高斯噪声环境和脉冲噪声环境;与经典自适应均衡算法相比,在收敛速度和稳健性两方面上,所提出的LT-CMA都有显著的提升.

In this paper, we prove that any pre-transformation with an upper-triangular matrix (including cyclic redundancy check (CRC), parity-check (PC) and convolution code (CC) matrix) does not reduce the code minimum distance and an properly designed pre-transformation can reduce the number of codewords with the minimum distance. This explains that the pre-transformed polar codes can perform better than the Polar/RM codes.

In this paper, we propose a Polar coding scheme for parallel Gaussian channels. The encoder knows the sum rate of the parallel channels but does not know the rate of any channel. By using the nesting property of Polar code, we design a coding/decoding scheme to achieve the sum rates.

现有星载微波系统中大量使用了各种形式的微带电路,但由于微带电路在低频率时尺寸较大,不利于星载产品小型化,因此提出了一种基于交指结构的微带电路小型化设计方法.该方法采用两个交指电容和高特征阻抗微带线构造的π型结构替代原有微带结构,从而减小微带电路尺寸.对该方法进行分析并给出了设计理论,进行了仿真及实测验证,并成功应用到多种不同形式的微带电路中.最后给出了两个已验证的实例,一个基于FR4材料的2.4 GHz功分器和一个基于R04003C的1.4 GHz耦合器.该设计方法可以在不改变电性能的基础上减少微带电路约40％的面积.

As the first kind of forward error correction (FEC) codes that achieve channel capacity, polar codes have attracted much research interest recently. Compared with other popular FEC codes, polar codes decoded by list successive cancellation decoding (LSCD) with a large list size have better error correction performance. However, due to the serial decoding nature of LSCD and the high complexity of list management, the decoding latency is high, which limits the usage of polar codes in practical applications that require low latency and high throughput. In this paper, we study the high-throughput implementation of LSCD with a large list size. Specifically, at the algorithmic level, to achieve a low-decoding latency with moderate hardware complexity, two decoding schemes, a multibit double thresholding scheme and a partial G-node look-ahead scheme, are proposed. Then, a high-throughput VLSI architecture implementing the proposed algorithms is developed with optimizations on different computation modules. From the implementation results on United Microelectronics Corporation (UMC) 90 nm complementary metal oxide semiconductor (CMOS) technology, the proposed architecture achieves decoding throughputs of 1.103 Gb/s, 977 Mb/s, and 827 Mb/s when the list sizes are 8, 16, and 32, respectively.

The performance of List Successive-Cancellation Decoding (LSCD) of Polar Codes with large list size have exceeded that of Turbo codes and Low-Density Parity-Check codes. However, large list size results in huge computation complexity and this limits the applicability of LSCD in high-throughput and power- sensitive applications. In this work, a low complexity design for LSCD with large list size based on list pruning is proposed. In particular, the property of the relative path metric (RPM) of each list candidate with respect to that of the most-likely candidate is investigated. It is found that the correct candidate has a low possibility of having a large value of RPM and based on this property, a list pruning method and the corresponding low-complexity LSCDs are proposed. From the simulation results, as compared to the conventional LSCD, the proposed LSCDs have negligible performance loss while the computation complexity is reduced by more than 80%. In addition, the proposed design is hardware-friendly and easily adaptable to the existing LSCDs hardware architectures.

Time-domain induced polarization (TDIP) measurement is seriously affected by power line interference and other field noise. Moreover, existing TDIP instruments generally output only the apparent chargeability, without providing complete secondary field information. To increase the robustness of TDIP method against interference and obtain more detailed secondary field information, an improved data-processing algorithm is proposed here. This method includes an efficient digital notch filter which can effectively eliminate all the main components of the power line interference. Hardware model of this filter was constructed and Vhsic Hardware Description Language code for it was generated using Digital Signal Processor Builder. In addition, a time-location method was proposed to extract secondary field information in case of unexpected data loss or failure of the synchronous technologies. Finally, the validity and accuracy of the method and the notch filter were verified by using the Cole-Cole model implemented by Simulink software. Moreover, indoor and field tests confirmed the application effect of the algorithm in the fieldwork.

Due to their provably capacity-achieving performance, polar codes have attracted a lot of research interest recently. For a good error-correcting performance, list successive-cancellation decoding (LSCD) with large list size is used to decode polar codes. However, as the complexity and delay of the list management operation rapidly increase with the list size, the overall latency of LSCD becomes large and limits the applicability of polar codes in high-throughput and latency-sensitive applications. Therefore, in this work, the low-latency implementation for LSCD with large list size is studied. Specifically, at the system level, a selective expansion method is proposed such that some of the reliable bits are not expanded to reduce the computation and latency. At the algorithmic level, a double thresholding scheme is proposed as a fast approximate-sorting method for the list management operation to reduce the LSCD latency for large list size. A VLSI architecture of the LSCD implementing the selective expansion and double thresholding scheme is then developed, and implemented using a UMC 90 nm CMOS technology. Experimental results show that, even for a large list size of 16, the proposed LSCD achieves a decoding throughput of 460 Mbps at a clock frequency of 658 MHz.

For polar codes with short-to-medium code length, list successive cancellation decoding is used to achieve a good error-correcting performance. However, list pruning in the current list decoding is based on the sorting strategy and its timing complexity is high. This results in a long decoding latency for large list size. In this work, aiming at a low-latency list decoding implementation, a double thresholding algorithm is proposed for a fast list pruning. As a result, with a negligible performance degradation, the list pruning delay is greatly reduced. Based on the double thresholding, a low-latency list decoding architecture is proposed and implemented using a UMC 90nm CMOS technology. Synthesis results show that, even for a large list size of 16, the proposed low-latency architecture achieves a decoding throughput of 220 Mbps at a frequency of 641 MHz.

以轴承约束状态下的机床主轴为研究对象,首先基于梁理论建立了机床主轴的运动方程,并采用有限元法得到主轴的矩阵形式的动力学方程,并以自由模态和实际工况条件下进行轴承约束状态下的主轴的模态分析.通过分析可知主轴在高速运转时的振动特性,并提出了新的设想;通过所建模型的分析,提高了产品初设计的可靠性,从而简化了成本,缩短了设计周期.研究结果为机床主轴系统或重载机械主轴系统的进一步优化设计和精度控制提供依据.

In this letter we propose a new hybrid code called "RM-Polar" codes. This new codes are constructed by combining the construction of Reed-Muller (RM) code and Polar code. It has much larger minimum Hamming distance than Polar codes, therefore it has much better error performance than Polar codes.

In this paper, we propose a novel iterative interference alignment (IA) scheme for the single-input single-output (SISO) interference channel system using minimum total mean square error criterion under the individual transmitter power constraints. We show that interference alignment under such criterion could be realized through an iterative algorithm. The convergence of the proposed algorithm is discussed. Simulation results, compared with several existing IA schemes, show that the proposed scheme can effectively improve the BER performance of the SISO interference channel system while maintaining the same degree of freedom as Cadambe-Jafar scheme.

A fast algorithm for inverse Cholesky factorization is proposed, to compute a triangular square-root of the estimation error covariance matrix for Vertical Bell Laboratories Layered Space-Time architecture (V-BLAST). It is then applied to propose an improved square-root algorithm for V-BLAST, which speedups several steps in the previous one, and can offer further computational savings in MIMO Orthogonal Frequency Division Multiplexing (OFDM) systems. Compared to the conventional inverse Cholesky factorization, the proposed one avoids the back substitution (of the Cholesky factor), and then requires only half divisions. The proposed V-BLAST algorithm is faster than the existing efficient V-BLAST algorithms. The expected speedups of the proposed square-root V-BLAST algorithm over the previous one and the fastest known recursive V-BLAST algorithm are 3.9~5.2 and 1.05~1.4, respectively.

This paper proposes a fast recursive algorithm for Group-wise Space-Time Block Code (G-STBC), which takes full advantage of the Alamouti structure in the equivalent channel matrix to reduce the computational complexity. With respect to the existing efficient algorithms for G-STBC, the proposed algorithm achieves better performance and usually requires less computational complexity.

We propose efficient algorithms for the extended Vertical Bell Labs Layered Space-Time architecture (V-BLAST) with selective per-antenna rate control (S-PARC). Instead of computing SNIRs from nulling vectors, we compute SNIRs from diagonal entries in the estimation error covariance matrix P, which are obtained from entries in F, i.e. the triangular squareroot of P. Then the square-root V-BLAST algorithm is applied, to compute F for an antenna subset from F for another subset. Moreover, when computing F, we can reuse intermediate results to further reduce the computational complexity dramatically. Assume M transmit/receive antennas. The proposed algorithm for the S-PARC scheme minimizing total transmit power has the speedup of 0.14M + 1.82, with respect to the corresponding SPARC algorithm computing SNIRs from nulling vectors, while the proposed algorithm for the S-PARC scheme maximizing total information rate has the speedup of (M + 58)/24.

We propose efficient minor subspace tracking (MST) algorithms to implement Distributed Interference Alignment (IA) based on Cognitive Radio (CR) that employs Interference Subspace Tracking (IST). The proposed MST algorithms utilize modified QR decomposition that decomposes a matrix into a unitary matrix and a lower triangular matrix. With respect to the existing practical and efficient MST algorithm for IST-IA, the proposed MST algorithms require less computational complexity.

This paper considers a relay-assisted bidirectional cellular network where the base station (BS) communicates with each mobile station (MS) using orthogonal frequency-division multiple-access (OFDMA) for both uplink and downlink. The goal is to improve the overall system performance by exploring the full potential of the network in various dimensions including user, subcarrier, relay, and bidirectional traffic. In this work, we first introduce a novel three-time-slot time-division duplexing (TDD) transmission protocol. This protocol unifies direct transmission, one-way relaying and network-coded two-way relaying between the BS and each MS. Using the proposed three-time-slot TDD protocol, we then propose an optimization framework for resource allocation to achieve the following gains: cooperative diversity (via relay selection), network coding gain (via bidirectional transmission mode selection), and multiuser diversity (via subcarrier assignment). We formulate the problem as a combinatorial optimization problem, which is NP-complete. To make it more tractable, we adopt a graph-based approach. We first establish the equivalence between the original problem and a maximum weighted clique problem (MWCP) in graph theory. A metaheuristic algorithm based on ant colony optimization (ACO) is then employed to find the solution in polynomial time. Simulation results demonstrate that the proposed protocol together with the ACO algorithm significantly enhances the system total throughput.