This letter presents a compact and cost-effective microstrip low-pass filter (LPF) based on the incorporation of coupled lines with an MLCC-loaded microstrip stub (MLCC-CL) for practical mobile applications. The primary concept of MLCC-CL structure is to induce the separation of transmission zeros (TZs) and increase their number, thereby resulting in wideband rejection with a compact filter footprint. An analytical method is developed for efficiently and systematically designing the proposed MLCC-CL LPF. A test vehicle targeting 2.4-GHz wireless mobile services is fabricated using PCB manufacturing technology. The proposed LPF achieves a low insertion loss of 0.37 dB at 2.4 GHz, a 20-dB rejection bandwidth spanning from 4.68 to 10.80 GHz, and an extremely compact size of 2.74 mm(2) (0.0014 lambda(2)(g)), providing suitability for practical applications.

For the next generation of mobile products, such as mobile phones, laptops, and wearable devices, high-speed signaling technology for millimeter wave (mmW) or Sub-THz bands is required. To transmit these high-frequency bands, transmission lines like substrate integrated waveguides (SIW) must be used. However, SIWs with via hole structures are unsuitable for the bending sections of flexible PCBs (FPCB), as they can cause copper pattern cracks. In this paper, a novel via-less SIW structure using EMI shielding film is proposed, which can be mass-produced through the FPCB fabrication process. This structure can also be applied to sections where via holes cannot be inserted. The simulated and measured insertion losses of the proposed SIW are 0.020 dB/mm and 0.052 dB/mm, respectively, at 40 GHz.

PCB/package stack-up design optimization is time-consuming and requiring a great deal of experience. Although some iterative optimization algorithms are applied to implement automatic stack-up design, evaluating the results of each iteration is still time-intensive. This paper proposes a combined Bayesian optimization-artificial neural network (BO-ANN) algorithm, utilizing a trained ANN-based surrogate model to replace a 2D cross-section analysis tool for fast PCB/package stack-up design optimization. With the acceleration of ANN, the proposed BO-ANN algorithm can finish 100 iterations in 40 seconds while achieving the target characteristic impedance. To better generalize the BO-ANN algorithm, a strategy of effective dielectric calculation is applied to multiple-dielectric stack-up optimization. the BO-ANN algorithm will be able to output optimized stack-up designs with dielectric layers chosen from the pre-defined library and the obtained designs are verified by 2D solver.

An on-die oscilloscope circuit is proposed to monitor the power noise waveforms inside IC due to the transient stress events for a more complete analysis of the effects of the transient stress events on the electronic systems. When the transient stress event occurs, the induced noise voltage waveform in the power supply is sampled and converted to digital data in real time. A trigger signal created by the event detector circuit is used to hold the digital data. The stored digital data inside the on-die oscilloscope are reconstructed back to the analog noise waveform based on the sampling process. The operation of each circuit block in the on-die oscilloscope is analyzed and validated by simulation and measurement results. The approximate bandwidth of the proposed on-die oscilloscope is extracted from simulation results. The power noise waveforms due to the transmission line pulse events and electrostatic discharge events are measured with an external oscilloscope instrument using cables and directly sampled and reconstructed by the on-die oscilloscope, and these measured and reconstructed analog noise waveforms are compared with each other.

Recently, new form factors, such as foldable, have increased demand for mobile products. Moreover, mobile phones should support the RF signal frequency up to the mm-wave frequency due to the expansion of 5G mobile products. Therefore, 5G foldable products require components that facilitate both mm-wave RF transmission and ultra-high flexibility for interconnecting through the hinge structure of foldable products. To improve flexibility, a flexible PCB must be thin with no ground vias in its bending section; in contrast, the low-loss flexible PCB for mm-wave transmission must be thick and have many ground vias, so there is a trade-off relationship between flexibility and RF characteristics. This paper proposes a new flexible PCB structure that does not experience problems regarding signal transmission to the mm-wave band, even when folded 200,000 times. To overcome the physical limits of the trade-off relationship, an interlayer air-gap was formed; a structure with a via-less and meander ground shape is proposed. The simulated loss of the proposed structure was 0.0254 dB/mm @ 10 GHz, and the isolation between signals ranged from 21.98 dB to 10 GHz. The simulated results of insertion loss and isolation were experimentally verified. The proposed structure is currently being applied to the RF flexible PCB that interconnects through the hinge of a foldable phone, and is currently being mass-produced.

For high-speed communication services such as 5G technology, the use of millimeter-wave (mmWave) components substantially increases in mobile applications. The interconnect based on a substrate-integrated waveguide (SIW) is an efficient solution for connecting these devices. However, the SIW characteristics in the mmWave frequency range are not sufficiently presented from the practical viewpoint. In this paper, the experimental characterization of mmWave SIWs in flexible printed circuit boards (FPCBs) and their simulation results are presented. A practical method using balanced/single slot transition is proposed for microstrip-to-SIW transition. Using a full-wave simulation and genetic algorithm, the proposed slot technique is optimized. It is experimentally demonstrated that the cutoff frequency affects the operating band of the SIW differently. The per-unit-length losses of the full-mode and half-mode SIWs are obtained as 0.0375 dB/mm and 0.0609 dB/mm, respectively. Using the measurements, the SIW type effect on the transmission loss is quantitatively analyzed, and the loss is increased up to 62.4% at 39 GHz.

In this paper, we propose periodic slit ground structure (PSG) to improve the signal integrity of multilevel signals at high data rate such as MIPI C-PHY. Periodic slits are added in the upper and lower ground planes of the stripline structure, without adding additional layers or increasing area, to reduce crosstalk among neighboring lines. The proposed PSG structure can effectively improve the eye-diagram, especially eye height (EH) in multilevel signaling. The effectiveness of the proposed structure is validated through simulation and measurement of PCB-flexible printed circuit board (FPCB)-PCB structure that emulates the interconnected system of MIPI C-PHY signal transmission in a mobile system. The measurements from the test structures show that at a 2.5 Gsps data rate condition, the PSG structures show improvement in EH and eye width (EW) by 38.6% and 9.7%, respectively, compared to stripline structures. The proposed idea can be generally applied in PCB designs that will be used in high speed multilevel signal transmission to improve EH.

In this paper, a dielectric properties extraction method for millimeter-wave applications is presented. Substrate integrated waveguide (SIW) cavity resonators with the same structure and varied thicknesses are employed to separate the dissipation factor (DF) of the substrate material for the cavity resonators. The dielectric constant and loss tangent of the dielectric substrate for the SIW is extracted at the resonance frequencies based on the unloaded Q-factors of transmission loss measurement. The DF from the unloaded Q-factors, which is highly dependent on the thickness of the substrate, is extracted using an iterative fitting process for the substrate thickness estimation without cross sectioning. To validate the extraction method, the SIW cavity resonators are fabricated using RO4003C substrate material and the dielectric properties are extracted in the X-band (8.2 to 12.4 GHz). The extracted thicknesses of the SIW resonators are validated by cross-sectioning. Additionally, the extracted dielectric properties are also verified by comparing the dielectric characteristics of the SIW resonators with the different thicknesses. With the presented method, the time expense for the conventional dielectric characterization method with cross-sectioning is reduced.

For 5G application, cable is essentially required for a low signal loss characteristic and immunity to the external noise inside a mobile product. A conventional coaxial cable can carry out such functions but there are critical disadvantages with using a cable. One is that interconnection of multiple signals in one cable structure is impossible, and the other is that automated assembly of a cable and a PCB is difficult. Consequently, these disadvantages restrict design flexibility of a product. Therefore, development of a new cable structure which overcomes these problems is necessary. In this paper, we propose a novel coaxial cable structure which uses a Flexible PCB (FPCB) process for foldable mobile device. This is the first cable structure with attributes including both a coaxial and a multiple channel. Since the proposed cable structure is flat and has a fixed form, automated assembly of a cable and a PCB could be made possible using a suction machine. We also propose a three-step cable design methodology for performance improvement. The first step involves design, fabrication, and measurement of the proto-type cable structure. The second step involves extraction of effective material characteristics of the proto-type structure. The third step involves signal integrity design and optimization with the proposed model. With the proposed methodology, estimated performance before fabrication is well correlated with the measurement at frequencies up to 20 GHz which includes the intermediate frequency (IF) of 5G application.

An on-die oscilloscope circuit is proposed for monitoring of system-level electrostatic discharge (ESD) noises at a power supply or signal line of an integrated circuit (IC). The noise waveform is sampled and converted to digital data in real time. ESD event detector circuits provide a trigger signal for holding the digital data when the ESD event is detected. The digital data are converted back to analog noise waveforms through post-processing. The operations of the proposed on-die oscilloscope circuit are validated in circuit simulations.

A method of moment (MoM)-based current reconstruction method is proposed to estimate the surface current density on the ground plane. Current continuity property is automatically enforced with Rao-Wilton-Glisson basis function. Both the least square method and the optimization method are utilized to solve the inverse problem and obtain the ground current. The proposed optimization method is successfully validated with numeric simulations and also a real-world measurement example. The reconstructed current distribution on the ground plane is further used in a typical radio frequency interference (RFI) example to perform RFI estimation and provide guidelines for RFI design. The proposed MoM-based ground current reconstruction method can be valuable to estimate and debug RFI issues in early design stage.

This paper, for the first time, proposes and verifies a new coaxial silicone rubber socket for high-bandwidth and high-density package test using a fabricated sample. In addition, this paper also characterizes and verifies the coaxial silicone rubber socket. Because of the proposed coaxial socket's novel coaxial structure, the proposed socket successfully achieves the electrical performance improvement. For verification, we compare the proposed socket and the previous noncoaxial socket in time domain. The proposed socket has greater eye height and eye width in the measured eye diagram than those of the noncoaxial socket. Moreover, the slope in the eye diagram is also improved in the case of the proposed socket. Therefore, the measured eye diagram for the coaxial socket shows the improvement in electrical performances. This paper also characterizes the equivalent RLGC model for the coaxial silicone rubber socket. In order to verify the RLGC model, we compare the insertion losses and eye diagrams from measurement, 3-D electromagnetic simulation, and the proposed RLGC model, respectively. Their insertion losses are comparable up to 20 GHz. Furthermore, the obtained eye diagrams are almost identical at the data rate of 9.6 Gb/s. In conclusion, this paper successfully proposes, verifies, and characterizes a new coaxial silicone rubber socket for the first time.

This paper, for the first time, proposes a novel stochastic model-based eye-diagram estimation method for 8B/10B and transition-minimized differential signaling (TMDS)-encoded highspeed channels. A stochastic model describes a behavior of an encoder with respect to probability. The previous eye-diagram estimation methods are based on an assumption that each bit has the same probability for 1 s and 0 s. However, the assumption limits to estimate an accurate eye-diagram for encoded high-speed channels. We first propose and apply the stochastic model for two types of 8B/10B encodings: 8B/10B and TMDS. For verification, we design the 8B/10B and TMDS encoder within MATLAB. The transient simulation for the 8B/10B encoded channels requires 9700 and 6600 s, respectively. However, the proposed method only requires 23 s in both cases. Furthermore, in the bit-error rate, the transient simulation provides the bathtub curve up to 10(-2) due to processing time and computing resources. In contrast, the proposed method with the stochastic model provides the bathtub curve up to 10(-8). In conclusion, this paper successfully proposes and verifies the stochastic model-based eye-diagram estimation method for 8B/10B-encoded high-speed channels.

In a near-field scanning system, each element of the measurement chain contributes to the thermal noise power density: probe, cables, amplifiers, and the measuring instrument. The signal-to-noise ratio (SNR) is strongly affected by the source output impedance, source temperature, the lossy transmission lines between probe and amplifiers, amplifier noise, amplifier temperature, and amplifier gain. By minimizing the loss between the probe and by using ultralow-noise amplifiers (noise figure (NF) <; 0.5 dB), SNR improves by >10 dB, compared to a setup using a 1-m cable and a 3-dB NF amplifier. A resonant probe that is cooled with liquid nitrogen improves measurement SNR by an additional 10-12 dB, as compared to a broadband probe of similar loop size. To combine the advantages of a resonant probe, without sacrificing the ability to measure broadband, a proof of concept is demonstrated that uses a tunable resonant probe which is synchronized to the frequency sweep of the spectrum analyzer.

We propose, for the first time, an explicit semiconductor physics-based through-silicon via (TSV) capacitance–voltage (CV) model. The effect of TSV CV hysteresis is demonstrated in the model, and the TSV capacitance is modeled with respect to dc bias voltage and the dimension of the TSV. The proposed model is verified by comparison to the measurement results. The effect of hysteresis in the model correlates well with the measurement results. This model can be utilized in a circuit level simulation to expand the possible application of the model to, but not limited to, hierarchical power distribution network impedance analysis, RC delay analysis, input–output power consumption analysis, and crosstalk and eye diagram simulation in any 3-D-IC systems using TSVs.

The ultra-thin design is essentially required for mobile and wearable applications, while the multiple operations are needed to be integrated in tiny space of the product. For achieving ultra-thin design and low radio-frequency interference (RFI) characteristics, the PCB embedded active IC structure was proposed in previous studies. However, there were limitations for fabricating the structure: one is difficulty to test, the other is high cost of the process, and the other is still exposure to RFI. In this paper, we propose the structure that can be fabricated by using normal PCB process with an anisotropic conductive film (ACF) bonding. The structure, which we propose, can overcome the limitations of the previous PCB embedded active IC structure. Among limitations, RFI could be effectively reduced by noise field reduction of radiation and conduction. The shielding effectiveness is key factor for reducing radiated field coupling, and signal integrity (SI) and power integrity (PI) factors, such as crosstalk and PDN mode resonance is critical factor for reducing conducted field coupling.

Multiple digital ICs sharing ground plane have potential problems of ground noise interference to each other. Current distribution on the ground plane can introduce intra-system EMC issues, which can possibly result in receiver desensitization issue in wireless devices. In this paper, a method of moment (MoM) based current reconstruction method is proposed to estimate the current on the ground plane. This method requires phased resolved near field data for accurate current reconstruction. The proposed method is validated by a numerical example. The current reconstructed from the proposed method is compared with the current from the simulation tool. The difference is within 3.5 dB which is acceptable for most engineering practice.

The 3-D integration helps improve performance and density of electronic systems. However, since electrical and thermal performance for 3-D integration is related to each other, their codesign is required. Machine learning, a promising approach in artificial intelligence, has recently shown promise for addressing engineering optimization problems. In this paper, we apply machine learning for the optimization of 3-D integrated systems where the electrical performance and thermal performance need to be analyzed together for maximizing performance. In such systems, modeling can be challenging due to the multiscale geometries involved, which increases computation time per iteration. In this paper, we show that machine learning can be applied to such systems where multiple parameters can be optimized to achieve the desired performance using the minimum number of iterations. These results have been compared with other promising optimization methods in this paper. The results show that on an average, 4.4%, 31.1%, and 6.9% improvement in temperature gradient, CPU time, and skew are possible using machine learning, as compared with other methods.

The radio frequency interference (RFI) problems are critical issue for communication devices. Among the components of the communication devices, the Analog-to-digital converter (ADC) is one of the important device which is related to the RFI problems, because of two reasons: one is that it is difficult to decouple the coupled noise after converting to the digital signals by ADC, and the other is that the ADC is becoming of utmost importance in not only communication systems but also automotive systems. With the increased number of magnetic field sources near the ADC that can alter its behaviors significantly, we need to know how magnetic field affects the performance of ADC, and how it could be shielded. In order to accurately evaluate the performance of ADC, the accurate expectation of noise coupling with consideration of shielding material is essentially required. In this study, we use the inductive transmission line model (I-TLM) method for evaluating the performance of ADC with magnetic field [1]. The I-TLM includes three separate sub-models: a model of the magnetic field coupling from the input of magnetic field source to the PCB feeding signal of ADC with or without shielding material, a model of the noise coupling from the PCB to the ADC input, and a model of the ADC behavior from the PCB input of ADC to the digital outputs of ADC. By using the model, the shielding effectiveness of shielding material is fast and accurately expected. The considered shielding material is ferrite, graphene, and copper, the trend of shielding effects are related to the material characteristic. The device under test (DUT) comprise the WPT coil, which is the targeted magnetic field source, and ADC which is fabricated using a 0.13 µm complementary metal-oxide semiconductor (CMOS) process and is wire-bonded to the designed PCB for ADC.

Meshed power and ground planes are commonly used in today's flexible printed circuit board (PCB). In this paper, a methodology to extract the effective characteristic impedance as well as the per-unit-length parameters of a transmission line with a meshed reference plane is proposed based on an equivalent transmission line model. The validity of this methodology is confirmed through comparison with full-wave simulations.