The influence of carbon concentration on the low-frequency noise (LF noise) of Si∕SiGe:C∕Si heterojunction bipolar transistors (HBTs) is investigated. When carbon is incorporated into these HBTs, representative noise spectra of the input current spectral density SIB show significant generation-recombination (GR) components. On the other hand, for transistors without carbon incorporation, no GR components were observed. When only 1∕f noise component is observed, the 1∕f noise level is found to be independent of the carbon concentration and the associated figure of merit of the normalized noise magnitude KB has a very good value of ∼4×10−10μm2. In order to relate the 1∕f noise and the high-frequency performance of the transistor, we studied and modeled the figure of merit defined as the ratio fc∕fT (fc is the low-frequency corner frequency and fT the unity current-gain frequency). Then we performed a detailed analysis of the GR components associated with the presence of the carbon. We found that the observed Lorentzian spectra are associated with random telegraph signal (RTS) noise. However, no RTS noise was measured in carbon-free devices. It is believed that the RTS noise is due to electrically active defects formed by the addition of carbon, typically observed for concentrations above the bulk solid solubility limit in silicon. The RTS amplitude (ΔIB) is found to scale with the base current, to decrease exponentially with temperature, and to be independent of the carbon concentration. The mean pulse widths (tH,tL) of the RTS are found to decrease rapidly with bias voltage, as 1∕exp(qVBE∕kT) or stronger. Our results confirm that electrically active C-related defects are located in the base-emitter junction, and the RTS amplitude is explained by a model based on voltage barrier height fluctuations across the base-emitter junction induced by trapped carriers in the space charge region. The observed bias dependence of mean pulse widths seems to indicate that two capture processes are involved, electron and hole capture. These C-related defects behave like recombination centers with deep energy levels rather than electron or hole traps involving trapping-detrapping processes.
Usually, the 1/f noise sources in heterojunction bipolar transistors (HBTs) are located in the intrinsic emitter-base (E-B) volume, either in the E-B junction space charge region or at the polycrystalline-silicon/monocrystalline-silicon interface in the neutral emitter layer. In this paper, to probe more accurately the location of the noise sources responsible for the 1/f noise, investigations on different HBTs fabricated with different technological parameters are undertaken. First, we have shown that carbon content has a negligible influence on 1/f noise level, but for high carbon content significant generation-recombination (G-R) noise components appear. Second, by studying influence of the emitter-base junction depth, we have shown that the 1/f noise sources are located at the polycrystalline-silicon/monocrystalline-silicon interface. Using statistical estimators, we have studied and modelled the dispersion of the 1/f noise. It was found that the dispersion in. the noise level increases as the inverse of the square root of the emitter area, similar to what was previously found for silicon homojunction transistors.
Low frequency noise measurements have been performed on Schottky‐Barrier Carbon Nanotube Field Effect Transistors and in random network of nanotubes (films) with different number of deposited layers. For SB‐CNFET the carrier number is calculated using an analytical model transport including Schottky barriers and the current‐voltage characteristics. The scaling of the 1/f noise with the gate bias allows the determination of the conductance fluctuation origin: carrier number (ΔN) or mobility (Δμ) fluctuations. Concerning random networks the 1/f noise amplitude depends on the nanotube arrangement. Then percolation theory is applied.
The 1∕f noise in carbon nanotube random network films has been experimentally and theoretically investigated. The authors have established that the percolation process is the primary physical mechanism influencing the noise level in such films. Using percolation theory, the authors give an expression for the 1∕f noise scaling that describes how noise is affected by design variables of nanotube macrostructures. As expected for percolation networks, the noise amplitude strongly depends on the film homogeneity. This shows that noise analysis could be used as a tool to evaluate the quality of films.
We have investigated the influence of carbon concentration on the low frequency noise (LFN) of Si/SiGe:C Heterojunction Bipolar Transistors (HBTs). The HBTs are supplied by ST-Microelectronics Crolles and are based on a 0.13 mu m BiCMOS technology. Three types of transistors were studied; they only differ by the amount of carbon incorporated. When carbon is incorporated, representative noise spectra of the input current spectral density, Sill, show important generation-recombination (G-R) components, while no such components are observed in carbon free transistors. When the 1/f noise component is unambiguously observed, the associated figure of merit K-B has a very good value close to 4.10(-10) mu m(2). In this paper we focus on the analysis of the G-R components associated with the presence of the carbon. Most of the observed Lorentzians are associated with Random Telegraph Signal (RTS) noise. No RTS noise is found in carbon free devices. The RTS noise appears to be due to electrically active defects formed by the addition of carbon, typically observed for concentrations above the bulk solid solubility limit in silicon. The RTS noise, amplitude Delta I-B and the mean pulse widths (t(H), t(L)), are analyzed as a function of bias voltage and temperature. The RTS amplitude is found to scale with the base current and to decrease exponentially with temperature, independently of the carbon concentration. The mean pulse widths are found to decrease rapidly with bias voltage, as 1exp(qV(BE)/kT) or stronger. Our results confirm that electrically active C-related defects are localized in the base-emitter junction, and the RTS amplitude is explained by a model based on voltage barrier height fluctuations across the base-emitter junction induced by trapped carriers in the space charge region. The observed bias dependence of mean pulse widths seems to indicate that two capture processes are involved, electron and hole capture. These C-related defects behave like recombination centers with deep energy levels rather than electron or hole traps involving trapping-detrapping process.
The extraction of the equivalent circuit parameters for bipolar transistors is undertaken via high-frequency S-parameter and low-frequency noise measurements. The extraction is exhaustively detailed here for a double purpose. First, it highlights the not-so-justified approximations so often made for the extraction of the extrinsic base–collector capacitance. Second, it emphasizes the similarity of the values obtained for series resistances in both the low-frequency and high-frequency ranges.
Low frequency noise measurements have been performed on a single-wall carbon nanotube connected by Ti/Au electrodes. It has been found that the 1/f noise decreases when the measurements are undertaken under vacuum and when the nanotube is partially degassed, showing a correlation between the fluctuation inducing the 1/f noise and the presence of gases. We show that the 1/f noise sources are located at the metal/nanotube contacts. When the device is annealed under vacuum at 450K, some Lorentzian shapes are observable and can be related to nanotube defects or to strongly bound molecules.
The dc and the low frequency noise in Si bipolar junction transistors (BJTs) of a 0.13 μm CMOS technology are presented in this paper. In particular, the influence of a superficial base doping (SBD) layer is investigated in devices before and after hot-carrier stress induced degradation. A classical increase in the perimeter non-ideal (generation/recombination) base current is observed on stressed transistors. Prestress 1/f noise analysis shows that both surface and perimeter contribution are present. Their relative importance is dependent on presence or not of the SBD and of the geometry. After stress, a very significant increase in the 1/f noise level is measured. It is associated to the creation of a large number of traps at the emitter perimeter.
Since their discovery, carbon nanotubes present many interesting electrical properties and can be candidates for future shrinking devices. Electrode realization on nanotubes remains a challenge. The deposited contacts must present interesting electrical parameters: low contact resistance, low series resistance, low parasitic capacity and low excess noise. The understanding of conduction phenomena induced into or near the metal/nanotube contact is necessary to improve the device. In this paper we present characterization of a Au-Ti deposited contact on a single-wall carbon nanotube. Steady-state current-voltage measurements, impedance and noise measurements lead to the frequency device characteristic. From this study a low frequency noise electrical model is presented. Using this model and the low frequency noise measurements, we show that the measured thermal noise has its origin in the electrode/nanotube contacts.
We studied the influence of carbon concentration on the low frequency noise (LFN) of Si/SiGe:C Heterojunction Bipolar Transistors (HBTs). For low and medium concentrations, the same level and evolution of 1/f noise versus bias and geometry is observed. The associated figure of merit, Kb, is closed to 4.10(-9) mu m(2). In this case, noise is mainly generated in the intrinsic transistor at the emitter-base junction. At higher carbon concentration, degradation of the DC and LFN parameter is observed.
This work presents low frequency noise results in high-speed Si/SiGeC heterojunction bipolar transistors (HBTs). In this new generation of HBTs carbon doping is processed during of the deposit of the epitaxial SiGe base layer in order to suppress boron out-diffusion. Low frequency noise study is performed on three type of transistors that differ by the thickness of the Si cap layer. The Si Cap layer is a non intentional doped Si layer deposit after the SiGeC base layer and prior the contact emitter structure. Thus, the results on the three different Si Cap HBTs allow us to study the influence of the Emitter-Base junction depth on the low frequency noise of these HBTs. Measurements of the equivalent input noise spectral density (S-iB) showed that spectra are composed of a 1/f component and the white noise is always reached at low bias. For the smallest transistors we observed the presence of Lorentzian(s) component(s). The excess noise sources are mainly located at the intrinsic emitter-base junction. Concerning the 1/f noise level, a quadratic dependence on base current bias and an inverse dependence on the emitter area are found. The normalized figure of merit, K-b = K(f)xA(E), is ranging between 1.7 and 2.1 10(-9) mum(2) and is among the best results published concerning SiGe HBTs, this shows that the incorporation of carbon do not have any consequence for the 1/f noise level and more generally for the LF noise characteristics. In the Si Cap thickness range used in this work, no noise degradation is observed when the electrical emitter-base junction is getting closer to the poly/mono emitter interface. Hence DC and AC characteristics could be optimized without changing the LF noise performances. Finally, from measurements at the input and at the output, the emitter series resistance is extracted and is found to be proportional to the Si Cap thickness.
The low-frequency noise characteristics of double self-aligned InP/InGaAs and two types of Si/SiGe heterojunction bipolar transistors (HBTs) were investigated. Spectral analysis shows no striking differences; the spectra are composed of a 1/f component and the white noise is always reached at low biases. A general trend for all the transistors was the presence of Lorentzian component(s) for the smallest devices. The voltage coherence function was always unity for SiGe transistors; and for the first time, it was found to be close to zero for InP devices. Concerning the 1/f noise level, both types of transistors have approximately a quadratic dependence on base current bias and an inverse dependence on the emitter area. Thus, a comparison of the 1/f noise level has been made using the K-b parameter, and values around 10(-9) mum(2) for SiGe HBTs and around 10(-8) mum(2) for InP HBTs were found. These results are of the same order of magnitude as the best published ones. The low-frequency noise results suggest that excess noise sources are mainly located at the intrinsic emitter-base junction for the two types of SiGe devices, and, for the InP HBTs, a correlated noise source is located at the emitter periphery. To compare different devices and technologies, f(c)/f(T) was studied as a function of collector current density and for some HBT technologies f(c)/f(T) proportional to J(c) (f(c) is corner frequency at which the white noise and 1/f noise are equal and f(T) is the unity current gain frequency). The effects of different processing conditions, designs and temperature were also investigated and discussed.
The 1/f noise of double InP/InGaAs heterojunction bipolar transistors is measured and analyzed. Standard mesa transistors, transistors with an air-bridge-connected base and hexagonal shaped transistors conceived for digital circuits are studied. These differences in the technology will have an influence on the origin of the noise sources. Regarding noise analysis, the base and collector internal current noise sources ib and ic are assumed to be correlated for all devices. This is highlighted by the voltage noise correlation function between the input and the output of the devices presenting an unusual behavior versus bias and geometry. The collector current noise source is divided into a correlated and uncorrelated part with base current. These parts give rise to spectral densities Sc and Snc. They are shown to have distinct origins for the different types of transistor geometry.
Low-frequency noise results obtained for III V pseudomorphic high electron mobility transistors (PHEMTs) and heterojunction bipolar transistors (HBTs) are reviewed. The experimental noise Set-LIP is presented and the equivalent circuits of devices including noise sources are established. Excess low-frequency noise comprises 1/f and Lorentzian-type components. An overview of gate and drain low-frequency noise of heterostructure field-effect transistors is provided in the paper. Different activation energy values attributed to traps are also reported. The authors concentrate on the If noise of GaAs-based PHEMTs. The results are analysed with the help of an equivalent circuit deduced from a study of the conduction. The fundamental 1/f noise sources are analysed and modelled according to the different bias range. With regard to HBTs. results for AlGaAs/GaAs. GaInP/GaAS and InP/InGaAs are used for comparison. The effect of the DX centre on the different materials is investigated. The analysis against the bias of the 1/f noise level of the current spectral density referred to the input Si-n gives information on the origin of the noise. The experimental bias dependencies of Si-n are compared to those available in the literature and are discussed. The importance of electrical passivation for the improvement of noise is investigated. An analysis of noise against emitter area and emitter perimeter is undertaken for an accurate location of noise sources.
In this paper, we have studied the 1/f low frequency noise of self-aligned and non self-aligned InP/InGaAs heterojunction bipolar transistors (HBTs). The total noise of transistor is modeled by two current noise sources. The evolution with geometry, technological process and bias, of the current spectral densities referred to the input and output of the devices, permit us to locate the noise sources. Noise is mainly generated in the intrinsic transistor, and an extra noise perimetric source has been identified for the self-aligned transistors at the emitter periphery.