This paper describes the utilization of ANSYS Designer with measurement validation to provide tool for analyzing, predicting and optimizing the EFT Burst transient noise suppression implementation and effectiveness to meet the requirement of IEC61000-4-4 [1] (EFT/B). In addition, the paper describes how electromagnetic simulations can provide chip-level immunity analysis for IEC 62215-3 [2]. The analysis of residual transient noise energy from transient noise suppressing devices can also provide significant benefits to EMS protection from chip, module, and all the way to board and system level. This study intends to provide an efficient simulation model to help electronic engineers enhancing their product design reliability.

Most of the IC-electromagnetic interference researches get information in the frequency domain. However, in the electromagnetic interference (EMI) leakage research field, the measurement of the time domain is crucial. We have already proposed a single point time-domain EMI signal for information leakage analysis, but a single point measurement is incompetent. This paper proposes an automated measurement platform that can measure, visualize, and plot a time-domain two-dimensional (muti-point) EMI data on Microchip dsPIC33EP512MC202. This proposed automation process can be conveniently extended and applied to a variety of different devices under test.

In this paper, time domain near field measurement for system level ESD (electrostatic discharge) is to solve temporary failures in ESD testing. First, this paper measure the waveform of ESD by oscilloscope then use simulation tools to create the model of ESD gun and nearfield simulation result. Finally, we use time domain near field measurement system to measure the sample and compare with simulation result.

This paper proposes a method for classifying combinations of instructions EMI of an embedded system by using a convolutional neural network. First, measuring the EMI emitted by 16 different combinations of instructions from an embedded system, then transform the EMI data to spectrogram and build a massive volume dataset to train the convolutional neural network. By analyzing the confusion matrix, we classify those similar combinations of instructions as the same groups. After several interactions, the 16 combinations of instructions can be classified into 5 groups. In the final result, the convolutional neural network model has 98% training accuracy and 83% prediction accuracy.

There is a growing awareness in the electronics manufacturer that system level ESD robustness is an important requirement for reliable products. System level ESD testing is today applied to a wider range of products than ever before. Designing ESD robust systems can be very challenging, especially for systems which integrate advanced technology integrated circuit (IC) components. While IC level ESD design and the necessary protection levels are well understood with reliability test from CDM or HBM model, system ESD protection strategy and design efficiency have only been dealt with in an ad hoc manner. We wish to explore realistic system or chip ESD protection requirements and strategies for normal operating IC chip or system, and therefore we have to establish the realistic ESD generator model to be incorporated with chip or system under investigation. Many of the most severe system level ESD design problems can be then traced to the affected location of system or chip with analyzing the residual ESD stress after injection and propagation. With this help, we can then adopt a consolidated approach to system level ESD design, and validate future success in building ESD robust systems through simulation in advance.

This paper develops a measurement platform that controls the detailed measurement process in response to information leakage measurement requirements, mainly through the integration of a robot arm and the measurement instruments to achieve the goal of automated measurement. The measurement result is EMI distribution on the transient current of a test circuit board. This method is used for the acquisition of complex EMI data for machine learning algorithms, and the data is obtained through a large amount of comprehensive information.

Since system level ESD testing is today applied to a wider range of products than ever before. Designing ESD robust systems can be very challenging, especially for systems which integrate advanced technology integrated circuit (IC) components. Solving ESD problems can lead to other complications on layout of chip and board level with verification. Since the ESD stress current makes its own path from injection spot to pins of IC under test or adjacent metal parts, such as trace or ground, we need to investigate those possible current paths forming a propagating chain on PCB of mounted component devices. A key finding of ESD design for sensitive IC mounted PCB is the analysis of the stress reaching IC / module/system level circuit so that best practice ESD protection and controls can be achieved. In this paper, we investigate the effect of different return paths on various ground plane configurations on board level ESD problem with the utilization of ESD generator model previously validated.

Highly integration and complexity of modern system in package (SiP) lead to critical issues of Power Integrity (PI), Signal Integrity (SI) and Electromagnetic Compatibility (EMC). In this paper, the Simultaneous Switching Noise (SSN) inducing cavity resonance is visualized via near field scan in both frequency. Furthermore, decoupling capacitors suppressing the resonance is also measured by near field scan for comparisons.

As the wireless applications for high-performance computing and video streaming is booming, the converging high performance devices for wireless and mobile application bring up the platform noise and RFI de-sensitivity issue. The problem involving with electromagnetic compatibility (EMC) or radio frequency interference (RFI) is becoming more critical for the system integration of smart phones design. To prevent RFI noise coupling to sensitive RF front-end and thus degrading wireless communications performance, this paper is mainly focusing on the effective shielding analysis of graphene coating on RF noisy chips or modules. We first adopt the near-field electromagnetic interference (EMI) scanning methods developed by IEC for chip level (IEC 61967-3) to investigate the distribution of EMI noise sources characteristic on the smart-phone platform under investigation. To effectively shield the electric, magnetic, or electromagnetic field originated from noise source, we then apply the shielding capability of graphene coating on the RFI noisy sources. Finally, we will use Over-the-air (OTA) measurement to show the RF performance improvement with implementation of graphene coating from the relationship between data throughput increase and RFI reduction on chips or modules under investigation.

In this paper, the verifications of two extraction methods for the electrical properties (dielectric constant: 8r and loss-tangent: tanδ) are presented. To verify the two extraction methods (Near-Field Technology method and Phase Delay method), a microstrip line is adopted to calculate the wavelength in dielectric for electrical properties comparison. According to the comparison results, both two extraction methods are well-correlated, also the microstrip line simulation with extracted the electrical properties shows good consistence in Insertion Loss and Return Loss with real sample. Finally, the suitability of the two extraction methods is proved for material electric properties.

Our previous research result shows that a microcontroller running different machine codes will emit different levels of EMI. This paper considers the EMI behaviors of the same testing program under different compilers or different compiler optimization options who can generate different machine codes for the same C program. The testing program is executed on a time-sharing open-source robot system to mimic practical use case of industrial applications. According to the experiment result, different compilers or different optimization options have large EMI impact for the same C program. The differences may be up to 29 dB at low-frequency bandwidth.

This paper proposes a method to design a low Electromagnetic Interference (EMI) software on a smart-tag system. This system is designed to collect temperature information. The information can be read by any smartphone's Near-field communication (NFC) reader. In this paper, two programs implemented by two types of methods are selected for such purpose. The first program is to get the temperature information and the second one is to send the information to an NFC transponder. The proposed methods are to implement these two programs by turning on the low-power mode or by switch the CPU into shutdown mode when idle. The measurement result shows a great EMI reduction at low-frequency range if the programs are implemented by switching CPU into shutdown mode. According to the measurement, the maximum difference is 14.38 dB at 3.2MHz for the first program and 17.68 dB at 3.2MHz for the second program.

This paper proposes a measurement-based method to estimate application (APP) specific EMI on a device running a time-sharing multi-tasking operating system (OS). The proposed method includes a near-field measurement technique for APP-specific EMI and an algorithm which can estimate system EMI with any different APPs execution sequences. Because of the task-scheduling feature, the execution order of APPs inside a system is dependent on various factors. Thus, the EMI estimation of such system may be complex. In this paper, the proposed method selects an OS and two APPs as a case study. The OS used in this paper is an open-source OS for robotic control with a commercial microcontroller. The measurement results show good agreements in the different execution orders of these 2 APPs. From 40MHz (system clock rate) up to 1GHz, the maximum difference is 4 dB within the range. This method can be used to estimate near field EMI of a complex HW/SW system.