This study introduces a novel simulation approach to effectively evaluate the shielding performance of magnetic absorbing materials. By simulating a microstrip line coated with these materials and defining shielding effectiveness (SE), we analyzed the shielding effectiveness of single materials at varying thicknesses. Furthermore, we explored the optimal material combinations, thicknesses, and stacking configurations to achieve broadband shielding under fixed total shielding layer thicknesses.

As chip dimensions scale down and data rates increase, thermal management has become a critical challenge in high-speed and high-power electronic systems, making electro-thermal co-design increasingly crucial. However, conventional transient thermal analysis relies on repeated three-dimensional simulations, leading to long computation times and low efficiency during design optimization. This work proposes a fast thermal equivalent modeling approach based on electro-thermal analogy. Steady-state thermal resistance and transient thermal capacitance are extracted and mapped to electrical resistance and capacitance to construct a physically meaningful RC thermal equivalent circuit. The transient temperature response is accurately reproduced through RC charge and discharge behavior in the electrical domain. By adjusting thermal resistance and capacitance parameters, transient thermal behavior can be rapidly evaluated without re-running full 3D thermal simulations. The proposed method reduces simulation time from several hours to approximately five seconds while maintaining high accuracy.

With the continuous miniaturization of packaging and the growing demand for high-speed signal transmission, electromagnetic compatibility (EMC) issues are becoming increasingly critical, while conventional far-field tests are often insufficient to localize radiation sources for debugging. This study focuses on near-field measurement and presents a printed circuit board (PCB)-based near-field electric-field probe integrated with a scanning system. By optimizing the transmission part and receiving structure, the proposed probe achieves improved sensitivity and better spatial resolution than a conventional reference probe. The measurement results demonstrate up to a 20 dB enhancement in sensitivity over the reference probe. In addition, a spatial resolution of 1.32 mm at 3 GHz enables accurate localization of radiation sources in display systems, facilitating efficient EMC troubleshooting and compliance verification.

This study presents a design method for a non-contact probe suitable for electric field injection. The probe is fabricated using an FR4 double-layer and single-layer board process, with screws securing it through positioning holes. The simulated bandwidth spans from 300 $\text{kHz}$ to 20 GHz, achieving a sensitivity range of $-30 \ \text{to} \ -40 \ \text{dB}$. The resolution varies from 2.49 mm to 2.14 mm, decreasing as the frequency increases, which enhances its applicability for small-scale electric field injection. Measurements up to 6 GHz demonstrate accuracy closely aligned with the simulation results.

With the increase in signal frequency in high-speed electronic systems, the impact of copper foil surface roughness on signal integrity and packaging performance has gained more attention. This study examines commonly used roughness models—the Hammerstad (Groisse) model and the Huray model—and analyzes their parameter relationships under low roughness conditions through ANSYS HFSS simulations. The Huray model can more precisely describe rough surface characteristics with nodal radius (NR) and surface ratio (SR), and maintains better applicability in high roughness scenarios. In contrast, the RMS parameter of the Groisse model is more suitable for low roughness scenarios. The findings of this study provide designers with simulation references and aim to contribute to the optimization of copper foil roughness design.

In this paper, the design of a near-field electric field probe utilizes aT-shaped receiver for signal coupling. Leveraging the advantages of a non-contact measurement architecture, the probe is developed to achieve high sensitivity, high spatial resolution, and wide bandwidth. The study focuses on designing an electric field probe fabricated on a PCB to meet market demands by improving existing probe designs. However, due to the trade-off between sensitivity and spatial resolution, this study aims to balance these two performance metrics. Ultimately, the bandwidth of the designed probe ranges from 300 kHz to 6 GHz, with a spatial resolution of 1.45 mm and a sensitivity of -35 dB at 5 GHz.

To meet the demand for high-speed circuits in advanced packaging, this study proposes a microstrip antenna-based method for accurate dielectric constant $(D_{k})$ extraction, focusing on high-frequency and millimeter-wave (mm-Wave) applications. Traditional methods, such as the Phase Delay [1] and Pole-Zero [2] techniques, often lack accuracy at mm-Wave frequencies due to their inability to account for radiation loss. To address this issue, microstrip antennas operating at 2.4 GHz, 5 GHz, and 28 GHz were designed and used to extract dielectric constant for FR-4 and PTFE (polytetrafluoroethylene) substrates. The extracted values were validated by comparing simulation and experimental measurements, demonstrating consistent and reliable results across different frequency bands. The proposed approach demonstrates superior accuracy and reliability compared to conventional methods, making it a promising solution for substrate characterization. This method supports the development of high-speed circuits and mm- Wave antenna designs, offering valuable applications in advanced packaging and high-frequency electronic systems.

Research different electromagnetic energy feeding structures and place them in the SIW power divider as energy excitation and reception devices. The power divider circuit operates at 28 GHz. First, design a monopole-based feeding structure using the principle of electric coupling. Next, design a loop-based feeding structure using the principle of magnetic coupling. Finally, install the monopole and loop feeding structures onto the designed SIW power divider, and analyze and compare the simulation results of both.

The purpose of this study is to effectively simulate and optimize the design of this power module packaging architecture, effectively reducing the direct current resistance (DCR) effect. Due to the high power output accompanied by significant heat dissipation, the unavoidable factor is the direct current resistance effect on the circuit. Additionally, during circuit operation, unnecessary parasitic inductance and capacitance are generated between components and circuits, which can cause electromagnetic interference (EMI) and increase switching losses in the overall system. Therefore, this project simulates and analyzes the resistance and parasitic inductance from power to ground in the VQFN (very-thin quad flat no-lead) package with Power module chips using the RDL process. By optimizing the structural design, the Via size, spacing, and quantity are improved to obtain the optimal structure and results.

This study investigates the performance of continuous vias and indirect vias in Redistribution Layer (RDL) circuits. Through simulation and analysis using CST Studio Suite, a comparison is drawn regarding the signal integrity, impedance variation, and eye diagram characteristics of these two via designs. The findings reveal that continuous vias demonstrate superior signal integrity over long-distance transmission, while indirect vias exhibit more stable impedance characteristics. Additionally, the eye diagram analysis highlights that continuous vias display larger fluctuations compared to indirect vias, indicating greater waveform variability. These results lead to the conclusion that continuous vias are preferable for applications requiring strict timing or routing constraints, whereas indirect vias offer better overall performance. Understanding the trade-offs between these two via designs is crucial for optimizing RDL circuit designs to meet specific application requirements.

In recent automotive interior advancements, the most notable change is incorporating in-vehicle displays. In recent years, with the emergence of audio-visual entertainment demands, emphasis has shifted towards upgrading the visual experience. Large screens and high-definition touchscreen automotive displays have successively appeared. The introduction of these novel applications, coupled with stringent electromagnetic compliance regulations, has brought forth EMS issues that were previously unseen. The current method for EMS testing involves using antennas to excite the entire surface with electromagnetic fields. However, this method only determines whether the product passes the test and does not pinpoint the areas causing failure. To address this limitation, an attempt is made to rapidly identify the failing sections by using a probe to excite the same field strength. Currently, available probes are incapable of generating a field strength of 200V/m before 1GHz, thereby failing to meet the original EMS specifications achieved by antennas. This paper introduces a novel EMS probe designed to generate a field strength 200V/m in the frequency range of 270MHz to 1GHz. Utilizing this probe for testing will facilitate quicker identification of the areas causing product failure, enabling subsequent improvements.

As electronic products continue to miniaturize, the demand for high efficiency in Advanced Package's high-end products is increasing. The RDL process, a crucial element in manufacturing, faces a significant challenge-board warpage. To address this manufacturing issue while optimizing the performance of high-speed circuits, this research modifies the power and reference planes from solid copper to a grid structure. However, designing the grid involves various factors such as open rate, residual copper rate, and opening method. Therefore, this study focuses on the design aspects of grid residual copper rate and open rate. Subsequently, a model of the grid plane is established, and the characteristics are extracted. The data is then integrated into an impedance matching equation on the grid plane. Finally, the equation's accuracy is verified through measurements on actual samples.

With the trend of high-frequency and high-speed circuit design, considering material parameters becomes crucial. By extracting the dielectric constant and loss tangent of materials as they vary with frequency, simulation results can better match actual measurement data. This paper further verifies the accuracy of the results using two different simulation software, which helps to eliminate possible errors or biases. Through such validation processes, we can ensure the obtained simulation results are reliable and accurate, and then enhancing the credibility and repeatability of the research.

This study explores the integration of Redistribution Layer (RDL) technique and Panel Level Package (PLP) technology to enhance the miniaturization and performance of electronic products focusing on the PCIe and SDRAM sections of an SSD with PM8617 as the main controller. Using Allegro PCB Designer and Ansys simulation tools, the project investigates impedance matching and crosstalk effects. Results indicate satisfactory performance for DDR4 SDRAM, with minimal attenuation and impedance variations. However, the PCIe circuit exhibits poor characteristics at high frequencies, attributed to impedance mismatches and crosstalk issues. The study emphasizes the importance of Power Integrity (PI) and Signal Integrity (SI) simulations in identifying and optimizing circuit performance. In conclusion, the research provides insights into signal transmission characteristics, identifies performance issues, and suggests improvements for advanced packaging technologies in electronic products.

In circuit design, achieving compactness poses challenges like reduced board spacing, increased resistance, and elevated voltage, causing heating and stress. To address these issues, we utilize flexible circuit boards and meshed copper grounding with a stress-dispersing structure, enhancing circuit durability. However, predicting impedance in meshed copper grounding is challenging due to its hollow structure. This paper integrates methods for calculating transmission line impedance, using published work[l] and simulations to address unpredictability. Integrated data enables line graphs to predict transmission line impedance for different opening ratios. Furthermore, an impedance-matching circuit, designed based on this data, maintains circuit characteristics under meshed copper grounding. The proposed calculation process is applicable and warrants further exploration.

System circuits often face challenges related to Electromagnetic Interference (EMI) and Electromagnetic Susceptibility (EMS). In traditional measurement techniques, contact-based methods are commonly used, requiring the design of contact points on the circuit under test. The objective of this project is to utilize non-contact near-field measurement techniques to measure and analyze the electromagnetic susceptibility (EMS) of single-ended transmission lines and differential transmission lines.

With the size of electronics products becoming smaller, the EMC issue is more important. The common use of analysis technique in EMC issues is contact-measurement technology. However, the high circuit density in package, it’s hard to make sure every single trace design with test point for contact-measurement. Non-contact technique such as nearfield measurement become popular with the advantage that it doesn’t require test point. Nearfield-measurement is usually used to find hot spots of the electromagnetic field and realized which region is the main noise location. To realize the reason for noise, coupling loss between probe and DUT should be de-embed.

In package use, the feed-in and lead-out points of the power supply are not fixed positions, and some components that require large operating currents require an independent power supply to ensure normal operation, so there may be multiple power supply pins on the circuit board, which means The position of the noise source is also not fixed, so this paper designs a sample with multiple power feed-in points, and reserves a chip placement area in the center of the sample to simulate the chip position of the actual product. This paper will use the commonly used system circuit As a research when the system line changes layers, the upper signal line will refer to the ground layer of the second layer and the lower layer signal line will refer to the power layer of the third layer. At this time, the return path will also be due to the gap between the ground layer and the power layer. They are degraded by being non-conductive to each other, which in turn introduces more power supply noise.

In this paper, a complete equivalent circuit model for electric field probes in non-contact measurement is proposed. At first, we used the electromagnetic simulation software by Ansys Q3D to construct a segmented three-dimensional electric field probe structure, extract the capacitance, inductance, and resistance respectively. Then we use the transmission line pi-model to create an equivalent circuit model and bring in the probe parameters extracted in sections by ADS circuit simulation software. Finally, compare the characteristics of the constructed probe with the original one to confirm the feasibility of the probe model. It can further realize the establishment of probe coupling transmission line structure so that the characteristics of the system circuit can be restored in the future.

For electronics products to become more miniature, the signal will much easier to be interference. Power noise is considered to be the main issue to signal interference. As stated above, Power Integrity (PI), Signal Integrity(SI) and Electromagnetic Compatibility (EMC) issues are gradually important. This paper researches interference distribution of power noise on the Printed circuit board(PCB) and analyzed its mechanism. The relationship between return path and noise interference is also proposed in this paper. With frequency domain and time domain nearfield measurement technology, the frequency band of power noise interference and mechanism of power noise interference could have a direct result for analysis.