In this paper, a dual loop CMOS phase locked loop (PLL) synthesizer with a wide operating frequency range for wireless low power medical systems is presented. A new low power, high speed, low noise phase frequency detector has been designed. The self-adjusting charge pump is a single-ended drain switching circuit and wide swing cascode current mirrors have been implemented to improve the output compliance. The oscillator is an LC-voltage controlled oscillator (VCO) with external inductor, integrated PMOS varactors & poly-poly caps for fine and coarse frequency tuning respectively. Low swing current mode/differential pair logic has been used to design part of the multi-modulus divider. The 2nd loop is a digital implementation that performs the frequency locking sequence. The typical oscillator tuning range is 808’937.6MHz. The total typical current consumed on a 1V battery is 2.58mA. The settling time is ≪1ms.

In this paper, a 1V Delta Sigma-ADC for bioelectric data acquisition is presented. Low power consumption is the major requirement in this design. Both the biquad low pass filter and the delta-sigma modulator are designed using switched-capacitors & switched-opamps. The low pass filter is used to limit the signal bandwidth to 100Hz. The modulator is a 3(rd) order 1-bit topology. The sampling frequency and OSR are 32kHz and 64 respectively. The digital filter is multi-stage & multi-rate to reduce power consumption. These circuits are a sub-part of a system-on-chip (SoC) for wireless body area sensor networks called the Sensium(TM). The total area of the circuits is similar to 0.38mm(2). The ADC achieves 58dB dynamic range (ENOB similar to 9.6 bits) and consumes 14uW of power.

The aim of this study is to model and design an efficient wireless system that is easy to integrate with other technologies or infrastructures at a low cost. The system would read analogue information recorded by a biomedical sensor in a transmitting unit attached to the patient. The recorded data are converted digitally using analogue-to-digital converter and sent to frequency-shift keying (FSK) transmitter through field programmable gate arrays (FPGAs). Verilog-HDL has been used to implement the required functions of the FPGA, such as bus interfacing, data buffering, compression and data framing. On the other hand, Simulink® software has been used to model and simulate FSK transmitter/receiver architecture suitable for short-range communications. Basically, a two-tone FSK signal is generated and passed through a noisy channel, which is then downconverted to baseband and passed to the frequency-modulating detector to restore the original transmitted bit stream. These illustrate how easily the mixed signal modelling can be well mapped into hardware description language (HDL) and mathematical programming techniques. The developed simulation models are used to explore the design change options. The behavioural HDL design has been interfaced to the Simulink model using system generator in a co-simulation environment, and the overall performance has been verified.

In this paper, a clock management CMOS PLL with full period phase-shifting of the divided clock is presented. The full-period phase-shifting is performed by generating a multitude of unique divided clock signals evenly spaced in time over one period of the divided clock and re-synchronising with the various oscillator output phases. Low swing current mode/differential pair logic has been used in this design. The current controlled oscillator is an interpolating feed-forward differential ring structure with 12 output phases. The typical oscillator tuning range is 85 to 720MHz. The phase noise at 1MHz offset from the oscillator frequency is -106.8dBc. To enable high-rate off-chip clocking, a new LVDS transmitter cell is designed and works over the full frequency range of the oscillator

In this paper, a 1.2V 0.35um CMOS PLL with a wide frequency range for clock generation systems is presented. A new full swing PFD has been designed to extend the operating frequency range. The charge pump is a drain switching circuit with high compliance regulated input cascode current mirrors. A voltage booster is used to supply the charge pump and extend its output voltage range. The oscillator is a full swing pseudo-differential CMOS ring structure. The typical oscillator tuning range is 30 to 300MHz. Cycle-to-cycle jitter due to a 100mV VDD variation (pk-pk) was 45ps. The current consumption of the PLL is 537uA at 300MHz.

The aim of this study is to model and design an efficient wireless system that should be easy to integrate with other technologies or infrastructures at a low cost. The system is reading analog information recorded by a biomedical sensor in a transmitting unit attached to the patient. The recorded data is converted digitally using ADC and sent to FSK transmitter through FPGA. Verilog HDL has been used to implement the required functions of the FPGA. SIMULINK/spl reg/ software has been used to model and simulate frequency-shift keying (FSK) transmitter/receiver suitable for short-range communications. A two-tone FSK signal is generated, passed through a noisy channel, down converted to baseband and passed to FM detector to restore the original transmitted bit stream. The behavioral HDL design has been interfaced to the SIMULINK model and the overall performance has been verified.

Finely-focused ion beams can be applied for advanced lithography, which provides some advantages over the conventional direct-write electron beam technology. In the focused ion beam technology, however, the ion penetration depth is limited, thus requiring the use of extremely thin resist layers or higher ion acceleration energies. These requirements are often undesirable for the current IC manufacturing processes. One solution to this problem is to exploit the top surface imaging (TSI) technique for dry developed FIB lithography schemes. In this paper, we investigated the novel lithography process, which combines focused Ga^+ ion beam (Ga^+ FIB) exposure, silylation and oxygen dry etching. The negative resist image by dry etching (NERIME) is a TSI scheme for DNQ/novolak based resists and can result in either positive or negative resist images depending on the extent of the ion beam exposure dose. The mechanism of the negative image formation in the NERIME was studied by TEM, and found to be mainly due to the creation of a thin gallium oxide layer during the oxygen dry development. The energy dispersive X-ray spectrometry microanalysis has found that gallium was implanted into the SPR660 resist to a depth of 50nm and the oxidised gallium layer has a thickness of approximately 15nm. It is also shown that the NERIME process can resolve nanometer resist patterns down to 65nm and yet maintaining a high aspect ratio. The NERIME process could be a useful nanofabrication method alternative to the current lithography processes.

A focused-ion-beam (FIB) machine is a versatile tool used extensively in the IC industry for conducting failure analysis, prototype fabrication, and device repair. Lithography can also be performed by the FIB technique for direct patterning of photoresists, followed by wet or dry development. We studied how the property of resist regions changes during oxygen dry development in the NERIME (the negative-resist-image-by-dry-etching) process after subjecting to FIB-assisted gallium implantation. The NERIME process is a single-layer scheme, in which DNQ/Novolak-based resists are exposed by gallium ions with FIB, followed by near-ultraviolet flood exposure, silylation, and oxygen dry etching. This process can yield both positive and negative resist images. In addition, the NERIME technique can achieve a nanometer resolution down to 80nm and a high aspect ratio for the processed patterns. A scanning-transmission-electron-microscope (STEM) analysis of the resist regions FIB-implanted with gallium ions has revealed that there is a ∼15-nm-thick gallium oxide (Ga2O3) layer on the surface. The presence of the gallium oxide layer was found to provide an increased resistance against subsequent oxygen dry development. It was concluded that the NERIME process could be used for a specific CMOS processing task, such as high-resolution lithography over resist surfaces with complex topography.

Focused ion beam (FIB) lithography has certain advantages over the rival direct-write electron beam lithography in terms of resist sensitivity, scattering and proximity effects. Combining the FIB lithography with both top surface imaging (TSI) and reactive ion etching (RIE) will further strengthen its advantages towards anisotropic processing of thicker resist layers in comparison to those used by the conventional lithography processes. Some of the inherent limitations to the FIB lithography, such as low-penetration depth and substrate damage, could also be eliminated. Our recently developed NERIME (negative resist image by dry etching) process combines these advantages due to the incorporation of focused Ga ion beam (Ga FIB) exposure, near UV exposure, silylation and dry development process steps. The work described in this paper follows our investigations into the NERIME process for nanostructure applications and also outlines a simplified (two-step) process, which incorporates Ga+ FIB exposure and oxygen dry development. The two-step NERIME process is a negative working TSI system for DNQ/novolak based resists. In this paper, nanometer resist patterns as small as 30 nm and having a high aspect ratio of up to 15 were resolved using the NERIME and the simplified two-step NERIME processes.

A focused-ion-beam (FIB) machine is a versatile tool used extensively in the integrated circuit (IC) industry for conducting failure analysis, prototype fabrication, and device repair. Lithography can also be performed using FIB for direct patterning of photoresists without using a mask. The FIB technique has several advantages over other maskless processes, such as direct-write e-beam lithography; ion-beam patterning of the photoresist offers higher resist sensitivity and lesser backscattering/proximity effects than the e-beam patterning.In this paper, we investigated a new FIB lithography process, called NERIME (negative resist image by dry etching). The NERIME process is a single-layer resist scheme, which implements a Ga+ FIB exposure of DNQ/novolak-based resists, followed by a near-ultraviolet (NUV) flood exposure, silylation, and oxygen dry etching. The NERIME process could not only yield both positive and negative images, but also achieve a nanometer resolution down to 65 nm and a high aspect ratio for the processed patterns. The principle of the negative image formation was also investigated by TEM and found to be due to the creation of a thin gallium oxide mask layer during etching. The NERIME process could be utilized for specific CMOS processing steps for the next generation technology nodes, such as high-resolution lithography over topographical surfaces. (C) 2004 Elsevier Ltd. All rights reserved.

This work presents a novel simulated model for a wireless data acquisition system. The system reads analogue information provided by two sensors and can be used for medical purposes. Real data has been obtained and a simulation of the two signals coming from both pH and pressure sensors embedded in the system has been employed. The created model contains four main units simulated using SIMULINK. At the first unit, the output signal is encoded to digital signal based on adapting one of the pulse coding modulation (PCM) algorithms. The second unit simulates the processor function that is responsible for framing, mixing and compressing the incoming bit streams from both sensors. The third unit, where the digital data is modulated and sent through different noisy channels, represents an efficient FSK transmitter/receiver model. At the receiver end, the signal is demodulated and processed inversely to extract the original analogue signal read by the two sensors. In this work, the performances of the systems using different PCM methods are studied comparatively in order to control the transmission and reduce the amount of data sent. This leads to a significant reduction in power consumption. In addition, efficiency of the RF channel in terms of bit error rate (BER) and through different noisy conditions is investigated.

Focused Ion Beam (FIB) lithography has significant advantages over the electron beam counterpart in terms of resist sensitivity, backscattering and proximity effects. Applying the Top Surface Imaging (TSI) principal to FIB lithography could further enhance its capability. In this paper we review different FIB lithography processes which utilise both wet and dry development. As of further development of this technology, we report a novel lithography process which combines focused Ga(+) ion beam (Ga(+) FIB) exposure, silylation and oxygen dry etching. The Negative Resist Image by Dry Etching (NERIME) is a TSI scheme for DNQ/novolak based resists and can result in either positive or negative resist images depending on the extent of the ion beam exposure dose. The NERIME process can resolve nanometer resist patterns as small as 30nm yet maintaining high aspect ratio of up to 15. The proposed lithography scheme could be utilised for advanced prototype IC's fabrication and critical CMOS lithography process steps.

Focused Ion beam (FIB) lithography has significant advantages over the electron beam counterpart in terms of resist sensitivity, backscattering and proximity effects. However, combining the FIB lithography with Top Surface Imaging (TSI) will extend its advantages by allowing anisotropic processing of thicker resist layers. This paper reports the development of novel single layer lithography process by combining focused Ga+ ion beam (Ga+ FIB) lithography, silylation and oxygen dry etching. The Negative Resist Image by Dry Etching (NERIME) is a TSI scheme for DNQ/novolak based resists and can result in either positive or negative resist images depending on the extent of the ion beam exposure dose. Results show that Ga+ ion beam dose in the range of 1μC/cm2 to 50μC/cm2 at 30keV can successfully prevent silylation of the resist, thus resulting in the formation of positive image after the dry etching. A negative image can be formed by using a second Ga+ ion beam exposure with a dose higher than 900 μC/cm2 at 30keV to pattern lines into the original exposed resist area. It was observed that resist regions exposed to such high doses can effectively withstand oxygen dry development, thus giving formation of negative resist image. In this study, nanometer resist patterns with high aspect ratio up to 15 were successfully resolved due to the ion beam exposure and anisotropic dry development. This novel TSI scheme for ion beam lithography could be utilized for the fabrication of critical CMOS process steps, such as deep isolation trench formation and lithography over substantial topography.

In this work, the authors explore the application of tetramethylammonium hydroxide (TMAH) developer chemical as a staining agent to enhance the top-down contrast of a silylated pattern to optical detection. When examining a silylated latent image top-down, the topographical differences generated due to the swelling of the silylated region are relied upon to identify pattern details. However, for lower exposure energy or shorter silylation times, there may not be sufficient silicon incorporation to allow clear identification of specific structures for cleaving. The authors have used the TMAH staining technique proposed by La Tulipe et al. to enhance the relief top-down, thereby facilitating analysis of even mildly silylated samples. Results will be presented illustrating the contrast enhancement after staining. Cross-sections of film profiles after aqueous silylation of an I-line photoresist with a solution of hexamethylcyclotrisilazane will also be generated.

Focused ion beams (FIB) have been widely used as a patterning lithography technique for advanced ICs and optical masks fabrication. FIB lithography has certain advantages over the direct-write electron beam lithography in terms of resist sensitivity, backscattering and proximity effects. However, combining the FIB exposure with both Top Surface Imaging (TSI) and dry etching will further extend its advantages towards anisotropic processing of thicker resist layers in comparison to those used by the conventional lithography processes. The newly developed NERIME (Negative Resist Image by Dry Etching) process combines these advantages by the incorporation of focused Ga+ ion beam (Ga+ FIB) exposure, near UV exposure, silylation and dry etching. The work described here follows our investigations into the NERIME process for nanostructure applications and outlines a simplified (two-step) process incorporating FIB exposure and oxygen dry development. The two-step modified NERIME process is a negative working TSI system for DNQ/novolak based resists. Results show that Ga+ ion beam dose higher than 800μC/cm2 at 30keV can modify the exposed resist areas as to withstand the subsequent oxygen plasma etching, thus giving formation of negative resist image. In this study, nanometer resist patterns as small as 30nm with high aspect ratio of up to 15 were successfully resolved due to the high resolution ion beam exposure and anisotropic dry development. The proposed two-step lithography scheme could be utilized for the fabrication of critical CMOS process steps, such as sub-100nm gate formations and lithography over substantial topography.

Top Surface Imaging (TSI) is a well-established technique to improve resolution for optical, ultraviolet (UV) and e-beam lithography. The Positive Resist Image by Dry Etching (PRIME) process is a high resolution single layer lithography system incorporating electron beam exposure, silylation and dry development. In this paper, modeling of nanostructures down to 30nm using PRIME with 0.5mum thick Shipley SPR505A resist are presented. The simulated profiles have been found to correlate closely with the published experimental data. Moreover, the liquid-phase silylation process step in PRIME has been experimentally characterised using FT-IR spectroscopy, UV spectroscopy, SIM spectrometry as well as cross-sectional SEM and TEM. The impact of different silylating agents on SPR505A is presented for both the UV exposed and e-beam crosslinked regions of the resist. Results show that an e-beam dose of 50 muC/cm(2) at 30KeV is sufficient to crosslink the resist and prevent silylation. The silylation contrast using Hexamethylcyclotrisilazane (HMCTS) was found to be the highest (11: 1) in comparison with other two silylating agents. It was found that the silicon incorporation in SPR505A resist follows Case II diffusion mechanisms.

In this paper, liquid-phase silylation process for Top Surface Imaging Lithography systems incorporating e-beam exposure has been experimentally investigated using FT-IR spectroscopy, UV spectroscopy, SIM spectrometry and SEM cross-sectionals. The impact of different silylating agents on Shipley SPR505A resist system is presented for both the UV exposed and e-beam crosslinked regions of the resist. Results show that an e-beam dose of 50/spl mu/C/cm/sup 2/ at 30keV is sufficient to crosslink the resist and prevent silylation. The silylation contrast using HMCTS was found to be the highest (11:1) in comparison with other two agents. It was found that the silicon incorporation in SPR505A resist follows Case II diffusion mechanisms.

Top Surface Imaging (TSI) is a well-established technique used to improve resolution for optical, ultraviolet and electron-beam lithography. The Positive Resist Image by Dry Etching (PRIME) is an advanced lithographic process incorporating electron beam exposure, near UV flood exposure, silylation and dry development. In this paper, the liquid-phase silylation process step in PRIME with Shipley SPR500A-series resists has been experimentally investigated as the most critical part of the process. FT-IR spectroscopy, UV spectroscopy, SIM spectrometry and cross-sectional SEM and TEM were used to characterise the silylation process. Electron-beam exposure with dose in the range of 25-100μC/cm2 at 30KeV was used to crosslinks the resist. Results show that an e-beam dose of 50µC/cm2 was sufficient to prevent silylation in the crosslinked areas. Two bifunctional silylating agents, the cyclic Hexamethylcyclotrisilazane (HMCTS) and the linear Bis[Dimethylamino] dimethylsilane (B[DMA]DMS), were examined and found that they silylate SPR505A much more efficiently than the previously reported Hexamethylcyclotrisiloxane (HMCTSx). The silylation contrast of the PRIME process using HMCTS silylating agent and SPR505A resist was found to be 11:1. The obtained silylated profiles of 1mm lines/spaces gratings for Shipley SPR510A resist have almost vertical sidewalls resulting in very high contrast between the silylated and unsilylated parts of the resist.

PRIME process with 1-line Shipley SPR505A resist was investigated using both simulations and experiments. Modelling of the PRIME process steps for 50-nm lines/spaces grating and 30-nm single line is shown. The liquid-phase silylation step in PRIME with SPR505A resist was experimentally characterised using FT-IR spectroscopy, UV spectroscopy and SIM spectrometry. The silylation agent used was hexamethylcyclotrisiloxane. The results show case II diffusion behaviour of the silicon incorporation in the SPR505A resist. The silylation contrast of the process as determined by the ratio of the silicon uptake in the near UV exposed over e-beam crosslinked regions was found to be 5 to 1. (C) 2002 Elsevier Science B.V. All rights reserved.

In this work, a new 2D resist silylation simulator called STIL II has been developed. This simulator extends the 1D methodologies used in the STIL simulator to two dimensions. The silylation process is modeled asa 2D initial boundary value problem, using Fick's Diffusion Equation to describe the diffusion of the silylating agent, which is then solved using in-house written Finite Element Analysis code. This model comprehends the balance of diffusion and reaction rates in the silylation process due to swelling of the resist film. The swelling effect itself, is modeled as a boundary movement problem with the boundaries, and therefore size, of each 2D element being modified in proportion to the silicon concentration in that region. The output of the STIL II simulator is then applied to previously published experimental dat. STIL II predictions agree well with mask center and mask edge silylation thickness experimental results for an I-line scheme. Silylation contrast has ben sued as an indicator to demonstrate the robustness of silylation processing to defocus effects.