We have exposed 10 wafers on the Engineering Test Stand (ETS), the 0.1 NA EUV scanner at Sandia National Laboratories in Livermore, CA. The EUV reflective mask was fabricated in-house using a Ta-based absorber stack on Mo/Si multilayers. The printed wafers contained different line sizes and pitches, line-end shortening measurement structures, contact holes, and patterns for estimating absorber defect printability. The depths of focus of each feature are typically 2 um due to the small NA of the scanner, and these should decrease by at least a factor of 6.25 as the NA's increase to 0.25. The data from measurements of line size through pitch and line-end shortening test structures indicate that both 1D and 2D optical proximity correction will be required. Defects that are either notches in or protrusions from absorber lines are the first to print, and they begin to print when they reach approximately 15~nm (1X) in size. This size threshold is in accordance with the 2003 ITRS specifications. We also report the first printing of SRAM bitcells with EUV lithography.

Defect printability and inspection studies were conducted on a programmed EUV defect mask. The mask was fabricated using Ta-based absorber stack on a Mo/Si multilayer coated 6025 plate. The defect pattern contains a variety of types of defects. The defect printing was performed on the Engineering Test Stand (ETS), which is the 0.1 NA EUV scanner at Sandia National Laboratories in Livermore, CA. The result showed that the printability of defects depended on the defect type and that either notches in or protrusions from absorber lines were the first to print. The minimum printable defect size was approximately 15 nm (1X). Defect inspection was performed on a 257-nm wavelength mask inspection system in die-to-die mode. Seventy-eight out of 120 programmed defects were detected when using 50% detection sensitivity. Maximum detection sensitivity was also tried. However, the number of defects is overwhelmed by the nuisance defects. The minimum defect detected was 52 nm in width. Simulations with a 2-D scalar model are used to verify the results.

The strong attenuation of extreme ultraviolet (EUV) radiation by organic materials necessitates the use of a thin layer imaging (TLI) process for EUV lithography. Several TLI processes have been identified for potential use for EUVL, and the common theme in these approaches is the transfer of the aerial image to a thin layer of refractory-containing material, which is then used as a dry O-2 etch mask during a subsequent pattern transfer to the device layer. One TLI process that has been extensively examined for EUVL is the silylated top-surface imaging (TSI) technology, which is discussed in this paper.Using a new disilane silylation reagent, dimethylaminodimethyldisilane (DMDS) and 13.4 nm exposure, the TSI process has been used to print 100 nm lines and spaces at equal pitch and 70 nm lines and spaces at a higher 1:2 pitch. The line edge roughness for the printed lines has been determined using a custom image analysis program and, as expected, varies with the particular EUV exposure system and numerical aperture. Exposures done with 193 nm lithography and the TSI process using DMDS are also shown for comparison to the EUV results.