This work demonstrates a novel junction termination extension (JTE) with a graded charge profile for vertical GaN p-n diodes. The fabrication of this JTE obviates GaN etch and requires only a single-step implantation. A bi-layer photoresist is used to produce an ultra-small bevel angle ( $\sim 0.1^{\text {o}}{)}$ at the sidewall of a dielectric layer. This tapered dielectric layer is then used as the implantation mask to produce a graded charge profile in p-GaN. The fabricated GaN p-n diodes show a breakdown voltage (BV) of 1.7 kV (83% of the parallel-plane limit) with positive temperature coefficient, as well as a high avalanche current density over 1100 A/cm2 at BV in the unclamped inductive switching test. This robust avalanche is ascribed to the migration of the major impact ionization location from the JTE edge to the main junction. This single-implant, efficient, avalanche-capable JTE can potentially become a building block of many vertical GaN devices, and its fabrication technique has wide device and material applicability.

Many emerging GaN electronic and optoelectronic devices comprise p-GaN layers buried below n-GaN or AlGaN. The activation of these buried p-GaN layers usually relies on the lateral hydrogen diffusion through the etched mesa sidewalls, which is known to induce nonuniform acceptor distributions. However, the acceptor profile, electric field ( ${E}$ -field) blocking capability, and leakage current mechanisms of the sidewall activated p-GaN layer have not been fully understood. This work addresses these knowledge gaps by fabricating vertical GaN p-n diodes with a thick ( $3.8~\mu \text{m}$ ) p-GaN. Two activation schemes were performed to allow the hydrogen diffusion through sidewalls and the top surface. For the sidewall activation, an analytical model was developed to depict the spatial distribution of the activated acceptor and the temporal evolution of this distribution with the increased annealing time. This model was validated using the ${C}$ – ${V}$ characteristics of the fabricated diodes with various radii. Under reverse biases, the breakdown ${E}$ -field and leakage current of the sidewall-activated diodes were found to be determined only by the edge area with the highest activation efficiency. The leakage mechanism agrees with the trap-assisted tunneling (TAT) model, and the peak junction ${E}$ -field can exceed 3 MV/cm, both being similar to those of surface-activated diodes. These results provide critical information for the design and processing of advanced GaN devices with the buried p-GaN.

Wide-bandgap (WBG) power semiconductor devices offer enormous energy efficiency gains in a wide range of potential applications. As silicon semiconductors are fast approaching their performance limits for high power requirements, WBG semiconductors such as gallium nitride and silicon carbide with their superior electrical properties are likely candidates to replace silicon in the near future. Along with higher blocking voltages, WBG semiconductors offer breakthrough relative circuit performance enabling low losses, high switching frequencies, and high temperature operation. However, even with the considerable materials advantages, a number of challenges are preventing widespread adoption of power electronics using WBG semiconductors. The U.S. Department of Energy’s Advanced Research Project Agency for Energy (ARPA-E), has launched several programs to fund transformational innovations in WBG semiconductor technology in order to overcome the barriers to adoption in power electronics. From materials and devices to modules and circuits to application-ready systems integration, ARPA-E projects have demonstrated the potential of WBG semiconductors in high-efficiency power electronics to enable broad adoption in energy applications.

Schottky diodes were formed by oxidizing Ru thin films deposited on n-type GaN at 400, 500, and 600 °C in normal laboratory air, and their electrical behavior was compared to that of a Ru/n-GaN reference device. The GaN epitaxial layers were grown via metalorganic chemical vapor deposition. The ruthenium films were deposited by electron beam evaporation. The Schottky barriers were characterized via current vs voltage (IV) and deep-level transient spectroscopy (DLTS) measurements between 70 and 400 K. The temperature dependent forward bias IV characteristics were fit, and the extracted temperature dependence of the effective barrier height for each device was shown to be caused by inhomogeneity at the metal/semiconductor interface. It was found that barrier inhomogeneity could be well described by a modified log-normal distribution. In reverse bias, it was shown that the low-energy tail of the barrier distribution is an important factor in determining leakage current. Favorable results occur for diodes oxidized at 400 and 500 °C, but raising the oxidation temperature to 600 °C results in a drastic increase in leakage current. DLTS measurements reveal one electron trap at EC − 0.57 eV in each of the samples. It was found that the concentration of this 0.57 eV trap increases substantially at 600 °C and that trap-assisted tunneling likely contributes an additional pathway for reverse leakage current.

The current versus voltage (I-V) characteristics of a Ni/GaN Schottky diode are measured from 50 to 400 K and the temperature dependence of the extracted barrier heights and ideality factors is described as a consequence of lateral inhomogeneity at the metal-semiconductor (M-S) interface. It is shown that by invoking a modified log-normal distribution of barrier heights at the M-S interface, the extracted barrier height temperature dependence can be well explained. Further, it is shown that this approach can describe the voltage dependence of the lateral barrier distribution revealing that for effective barrier height values calculated at increasingly higher voltages, the distribution begins to converge on a single value of 0.77 eV. This value is in good agreement with the flat-band barrier height of 0.77 ± 0.02 eV extracted from capacitance-voltage (C-V) measurements on the same device. The same procedure is used to describe the parallel conduction path apparent at low temperatures, revealing its behavior is indicative of an additional Schottky region with an increased density of low barriers which are more heavily perturbed by external bias. Finally, the model is successfully applied to previously published work on various Schottky diodes structures.

Carbon, a compensator in GaN, is an inherent part of the organometallic vapor phase epitaxy (OMVPE) environment due to the use of organometallic sources. In this study, the impact of growth conditions are explored on the incorporation of carbon in GaN prepared via OMVPE on pseudo-bulk GaN wafers (in several cases, identical growths were performed on GaN-on-Al2O3 templates for comparison purposes). Growth conditions with different growth efficiencies but identical ammonia molar flows, when normalized for growth rate, resulted in identical carbon incorporation. It is concluded that only trimethylgallium which contributes to growth of the GaN layer contributes to carbon incorporation. Carbon incorporation was found to decrease proportionally with increasing ammonia molar flow, when normalized for growth rate. Ammonia molar flow divided by growth rate is proposed as a reactor independent predictor of carbon incorporation as opposed to the often-reported input V/III ratio. A low carbon concentration of 7.3 × 1014 atoms/cm3 (prepared at a growth rate of 0.57 µm/h) was obtained by optimizing growth conditions for GaN grown on pseudo-bulk GaN substrates.

Wide-bandgap power semiconductor devices offer enormous energy efficiency gains in a wide range of potential applications. As silicon-based semiconductors are fast approaching their performance limits for high power requirements, gallium nitride (GaN), silicon carbide (SiC), and diamond, with their superior electrical properties are likely candidates to replace silicon in the near future. Along with higher blocking voltages wide-bandgap semiconductors offer breakthrough relative circuit performance enabling low losses, high switching frequencies, and high temperature operation. The progress of the development of high voltage, high current wide-bandgap power switching devices in the ARPA-E SWITCHES program is reviewed. The performance of various rectifiers and transistors, which have been demonstrated, is discussed. Material and processing challenges and reliability concerns for wide-bandgap power devices are also described. A glimpse into the future trends in device development and commercialization is offered.

Wide-bandgap power semiconductor devices offer enormous energy efficiency gains in a wide range of potential applications. As silicon-based semiconductors are fast approaching their performance limits for high power requirements, wide-bandgap semiconductors such as gallium nitride and silicon carbide with their superior electrical properties are likely candidates to replace silicon in the near future. Along with higher blocking voltages wide-bandgap semiconductors offer breakthrough relative circuit performance enabling low losses, high switching frequencies, and high temperature operation. However, even with the considerable materials advantages, a number of challenges are preventing widespread adoption of power electronics using WBG semiconductors.

An epitaxial lift‐off (ELO) process for GaN materials has been demonstrated using bandgap‐selective photoenhanced wet etching of an InGaN release layer. This process has been applied to GaN layers grown on sapphire as well as native GaN substrates using a perforation technique to scale the process up to wafers of arbitrary size. The process has the advantage of leveraging conventional MOCVD growth to form the release layer, with minimal degradation of films grown on top of the release layer. The ELO process is non‐destructive and can enable cost reduction through reuse of the native GaN substrate after ELO. The GaN films have been characterized before and after ELO using AFM, SEM, XRD, TEM and by fabricating Schottky barrier diodes. The performance of Schottky diodes fabricated on GaN‐on‐sapphire structures was found to improve after ELO. Potential applications for this technology include GaN power and optoelectronic devices as well as flexible electronics. Shown is a 5‐micron‐thick GaN epitaxial film released from a 4‐inch sapphire substrate using perforations on a 1‐mm pitch. The yellow luminescence of the nitrogen face of the released film is visible under ultraviolet illumination.

In this work, in-depth numerical studies for Li-ion cells with blended cathode were conducted using Newman’s pseudo-2D model. A spontaneous material-potential balance in the blended electrode was quantified at different open-circuit states. Using the matrix exponential approach, Newman’s model can be efficiently solved in the high-frequency discretized time space. This numerical method enables fast simulation and accurate parameter estimation of a practical drive cycle.

The results of studies focused on understanding materials-electrical correlations for GaN-based films deposited on 150 mm diameter Si wafers in a batch MOCVD system are reported. A wide range of film stress and electrical conduction is observed at consistent and good X-ray FWHM values. The vertical leakage currents show a strong asymmetry on the polarity of the bias voltage. Film stress (wafer bow) and impurity variations in the buffer layers show no correlation with leakage currents. Surface pit formation and conductive interfaces are critical to determine the leakage currents in buffer layers. TEM image confirms that surface pit stems from voids in Si substrate. The vertical leakage currents follow the Frenkel-Poole conduction model at the trap energy of 0.7 eV. Vertical leakage currents measured in films can be reduced by a novel, post-growth process. (c) 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

V-defects can be very detrimental to the functionality of GaN based light emitting diodes (LEDs) and high power transistors grown on 200 mm Si (111) substrates. This work focuses on reducing these detrimental defects in the GaN/AlGaN/AlN stacks grown in a Veeco Turbodisc Maxbright MOCVD system. The origins of V-defects in GaN/AlGaN/AlN material were studied by cross-sectional transmission electron microscope (TEM) and high angle annular dark field scanning transmission electron microscopy (HAADF-STEM). It was found that V-defects were associated with inversion domain boundary (IDB) like defects, which started from the interface between the AlN nucleation layers and the Si (111) substrates. These IDB-like defects were terminated by generating V-defects in the upper layers. Encouraging the 2-D GaN growth mode helped to close these V-defects in the GaN layers, but relaxed the built-in compressive stress faster and resulted in excessive wafer bow. Optimizing the V/III ratio during the AlN nucleation step improved AlN crystal quality and surface morphology, and close V-defects in GaN without degrading wafers stress condition.

In GaN-on-silicon there are many challenges which are currently encountered when making this technology compatible with standard Si-CMOS fabs especially the bow. Bringing this technology to CMOS fabs can potentially drive the costs down, in addition to the cost advantage expected from large wafer sizes. We report here on the impact of AlN nucleation layer on crystal quality and bow. The focus will be on V/III ratios and pre-dose conditions for AlN, which have considerable effect on the AlN/AlGaN/GaN buffer structures. We will also discuss how AlN thickness can be used to tune the bow. Finally, a brief description on the effect of surface pits will be presented.[GRAPHICS]The image presents 200 mm GaN-on-silicon wafers placed on a graphite carrier. The MOCVD system is capable of handling three 200 mm wafers.(C) 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

The progress in the development of 4H-SiC substrates useful for power electronics applications is reviewed. Currently, SiC substrates of diameter 76-100 mm are now commercially available with micropipe defect density <0.1/cm and screw dislocation densities <2000/cm. Epitaxial film substrates are manufactured with film thickness up to 25 um, and in R&D with film thickness to 100 um. 4H SiC epiwafers exhibit low values of basal plane defect density. Thick film epiwafers show carrier lifetimes on the order of microseconds. Examples of the use epitaxial substrates in the fabrication of power semiconductor devices provided.

The thick films of GaN were investigated using X-ray diffraction, micro-Raman spectroscopy and photoluminescence spectroscopy. The thick films of GaN were prepared on (0001) sapphire using high rate magnetron sputter epitaxy with growth rates as high as 10–60 m/min. The width of the X-ray rocking curve ((0002) reflection) for the sample produced by this method is ∼300 arc-sec. Only the allowed modes were observed in the polarized Raman spectra. The background electron concentration is lower than 3×1016 cm−3, which was determined from the Raman spectra. The phonon lifetime determined from Raman E2(2) mode was 1.6 ps, which is comparable to that of bulk single crystal GaN grown by sublimation (1.4 ps). The full-width-at-half-maximum of the near band-edge photoluminescence peak obtained at 77K is ∼100 meV.

A new process route for lateral growth of nearly defect free GaN structures via Pendeoepitaxy is discussed. Lateral growth of GaN films suspended from {112¯0} side walls of [0001] oriented GaN columns into and over adjacent etched wells has been achieved via MOVPE technique without the use of, or contact with, a supporting mask or substrate. Pendeo-epitaxy is proposed as the descriptive term for this growth technique. Selective growth was achieved using process parameters that promote lateral growth of the {112¯0} planes of GaN and disallow nucleation of this phase on the exposed SiC substrate. Thus, the selectivity is provided by tailoring the shape of the underlying GaN layer itself consisting of a sequence of alternating trenches and columns, instead of selective growth through openings in SiO2 or SiNx mask, as in the conventional lateral epitaxial overgrowth (LEO). Two modes of initiation of the pendeo-epitaxial GaN growth via MOVPE were observed: Mode A - promoting the lateral growth of the {112¯0} side facets into the wells faster than the vertical growth of the (0001) top facets; and Mode B - enabling the top (0001) faces to grow initially faster followed by the pendeo-epitaxial growth over the wells from the newly formed {112¯0} side facets. Four-to-five order decrease in the dislocation density was observed via transmission electron microscopy (TEM) in the pendeo-epitaxial GaN relative to that in the GaN columns. TEM observations revealed that in pendeo-epitaxial GaN films the dislocations do not propagate laterally from the GaN columns when the structure grows laterally from the sidewalls into and over the trenches. Scanning electron microscopy (SEM) studies revealed that the coalesced regions are either defect-free or sometimes exhibit voids. Above these voids the PEGaN layer is usually defect free.

Improvements in the quality and consistency of 4H-SiC epitaxy wafers are now starting to enable growth of commercial SiC power device applications in areas such as inverters for photo-voltaic systems and power supplies. Recent work has achieved very low epitaxy surface roughness and very low BPD (Basal plane dislocation) in the on 4 degree off-axis substrates. In this paper, we report characterization of the very low BPD epitaxy wafers and a newly observed triangular defect.