This paper presents a Wi-Fi RF transceiver with a 2.4GHz/5GHz/6GHz tri-band switchable design. To support the wide 320MHz channel BW for Wi-Fi 7, the RF LC-tank response and TXLPF drooping are compensated via a proposed TX flatness calibration scheme that flattens the amplitude difference over the 320MHz signal bandwidth and improves the EVM over each sub-carrier. This work also proposes a reset-pulse XO design to significantly reduce the XO phase noise. A VCO pushing compensation and calibration technique is developed to suppress the sensitivity to LDO noise and DC-DC spurs. The integrated PLL RMS jitter is 57.9fs at 7.115GHz. The measured TX EVM floor achieves -42.6dB at OdBm output power with EHT320 4096-QAM signals. This RF Transceiver occupies 3.74mm 2 in 55nm CMOS technology.

The new WiFi 11ax standard carries several improvements compared to its 11g/ac predecessor. It supports multi-user MIMO and uses OFDMA modulation, which enables users to share the same channel via allocated Resource Units (RU). In addition, it provides transmit power adjustments for better operation in a dense environment. Furthermore, the standard calls for the support of MCS11 1024-QAM modulation with target transmit (TX) EVM of -35dB, which results in nearly 25% higher throughput compared to MCS9 256QAM. In order to improve user experience to guarantee signal quality between walls and obstacles, a <; -40dB receive (RX) EVM is required for 1024-QAM signals derived by fading-channel model emulation and field measurements. Such new features have posed stringent requirements to in-band distortion/noise of both TX and RX as well as the TX emission, especially in the RU case (minimum 2MHz) due to higher power density.

An integrated look-ahead DFS scheme relies on having a dedicated low-cost receiver that constantly scans the WiFi band for radar existence. A table of radar-occupied WiFi channels is constructed as a result. When it is time to switch channels upon radar in-channel detection, the WiFi transceiver can directly jump to an empty channel without having to sniff for 60s, as required by FCC/ETSI regulations. The scheme results in zero-wait time and zero impact to WiFi throughput. Circuit implementation relies on reusing some readily existing hardware in a 55nm CMOS n×n MIMO WiFi transceiver to reduce die cost.

Digital transmitters (DTX) have gained interest in the past few years because of their potential to provide compact die area, better efficiency due to the switching nature of the power amplifier core, and scaling with CMOS technology [1-3]. Quadrature DTX architecture [1] is favored over polar [3] or outphasing [4] for wideband applications, such as WiFi, because of its ability to scale easily to higher signal bandwidth. Moreover, there is no need for a CORDIC block to convert I/Q signals to amplitude/phase signals [3], which results in large-signal bandwidth expansion, nor the need for very precise alignment [3,4] using fast digital circuits and excessive calibrations. However, the promised potential of quadrature DTX technology fell short of what has been expected because of the excessive parasitics at the TX output as a result of the traditional way of combining the two I and Q paths at the PA output [1]. An I/Q power-cell sharing method by time-division multiplexing between local oscillator (LO) I/Q signals has been proposed for a low-band cellular DPA (800MHz) to address this problem [2]. However, the technique requires 25% LO, which is very difficult to realize for the 5.5GHz WiFi band and is very power hungry. The DTX in Fig. 9.5.1 addresses this issue through a different method of I and Q combining as well as a new digital baseband signal mapping for a compact die area, low parasitics at the PA output, lower loading on LO lines and better overall efficiency.