This paper reviews some of the recent work at the Nanoelectronics Research Centre at the University of Glasgow on the optimisation of 50 nm metamorphic GaAs and InP HEMTs. Typical DC and RF figures of merit obtained from 50 nm metamorphic GaAs HEMTs include I-dss of 800 mA/mm, g(m) of 1100 mS/mm, threshold voltage standard deviation of 5 mV across a 25 mm x 25 mm area, f(T) of 440 GHz and f(max) of 400 GHz, all at a drain bias of 1.0 V To our knowledge, these are the highest operating frequency GaAs-based transistors to date. At V-d=0.8 V and V-g=-0.6 V, a NFmin and G(ass) of 0.7 dB and 13 dB respectively at 26 GHz have been demonstrated.For similar geometry InP HEMTs, DC and RF figures of merit are the following: I-dss of 900 mA/mm, g(m) of 1600 mS/mm, f(T) of 550 GHz, f(max) of 440 GHz, and NFmin and G(ass) of 0.9 dB and 14 dB respectively at 26 GHz. The highest performance 50 nm HEMTs reported to date. Using these technologies, single stage MMMICs with gain of at least 7 dB and a return loss of better than -5 dB across a 24 GHz bandwidth from 71 GHz to 95 GHz have been realised. Noise figure of 2.5 dB and associated gain of 7.3 dB at 90 GHz have been achieved with a DC power consumption of 20 mW (c) 2006 Elsevier B.V. All rights reserved.

In this paper, we review a range of significant effort is taken in the complete optimization of nanofabrication techniques which enable the realization of the active device technology. uniform, high yield, high performance 50 nm T-gate m-v Working at critical dimensions of 50 um results in the High mMTs). These requirement to develop robust nanofabrication technologies technologies have been applied in the fabrication of a range of lattice matched and pseudomorphic InP HEMT~ and GaAs with tight tolerances and high reproducibility if high metamorphic HEMTs with functional yields in excess of 95%, performance devices are to be realized based on modifying threshold voltage uniformity of 5 mV, DC transconductance the vertical and lateral architectures. Only by having a of up to 1600 mS/” and rT of UP to 480 GHz. These robust 50 nm critical dimension testbed such as the one described in this paper, can the optimized devices reported technologies and device demonstrators are key to enabling a wide range of millimeter-wave imaging and sensing applications beyond 100 GHz, particularly where array-based here he multi-channel solutioos are required. 11.50 NM T-GATE PROCESSES Index Terms Nanofabrication, 111-V semiconductor devices, millimeter-wave ICs. The key to the realization of a robust 50 MI T-gate process for 111-V HEMTs is having a large process latitude gate lithography technology and highly controllable gate recess etch strategy. The millimeter-wave frequency hands from 313-3013 In the work reported in this paper, all gate definition is GHz have a number of significant applications including by beam lithography using a Leica Cambridge broadband radio communications; high data rate fibre EPBGS-HR Beamwriter operated at 100 kv. Significant systems; automotive collision warning; concealed weapon improvements to device yield and uniformity were detection; passive imaging system capable of “seeing” achieved by utilizing a beam focusing technique based on a through rain, Snow and fog; environmental, atmospheric set of structures defined on the substrate, rather on the, and pollution monitoring systems. substrate holder as is more commonly the case. In this Many of the applications have operating frequencies Of way, defocusing due to height errors and sample tilt are around 100 GHz and beyond. A significant percentage of minimized, the markets are in the areas of sensing and imaging where Two gate resist strategies have been investigated in detail receiver sensitivity, determined primarily by the noise one based on a P M M A / P ( M M ~ U ) bi-layer StruCme performance of the front-end low noise amplifier, where and the other based on a PMMAILORRTVIII resist stack. High Electron Mobility Transistors (HEMTS) outperfom The ~MMA/P(MMA/MAA) stack is a simplification of a all Other available technologies, is a key Performance more widely used tri-layer resist stack. We have found that metric. Finally, there are numerous cases where imaging to a bilayer stack in improved resist arrays would. be the preferred system solution. thickness uniformity in the source-drain gap of a device, These requirements place huge demands on the active with no reduction in device yield. The latter is a device and sub-system technologies for millimeter-wave consequence of the sub-loo um features being realized in applications in terms of inherent bandwidth and noise this work. ~i~~ 1 shows an SEM cross.section of a performance, but also require these parts be available in typical 50 nm footprint device realized using the bilayer significant volumes at reasonable cost. resist approach. The challenge for the device technologist therefore is The P M M ~ O W I stack in has to realize a m u f a c m a b k high Yield Process where advantages in t e m of process latitude offered by using

We report on the fabrication of 50nm metamorphic GaAsHEMTs with a very high yield and uniformity as determined by DC characterisation, and excellent RF figures of merit. The T-gates were realised using a combination of high resolution electron beam lithography using a bi-layer (rather than the usual tri-layer) of PMMA/Co-polymer and a selective wet etch to form the gate recess. With an electrical yield greater than 95 %, the devices displayed a threshold voltage of -0.445V with a standard deviation of ± 0.005V. The transconductance of the devices was 1169mS/mm 83 mS/mm and demonstrated a cut-off frequency, fT of 330GHz. I. INTRODUCTION Due to their excellent performance, High Electron Mobility Transistors (HEMTs) based on InP are of great interest for the fabrication of high-speed electronics for applications such as 160Gbit/s data communications (1) and environmental monitoring using the G band (2). However InP substrates fragile, which can limit the yield and are not available in as large diameter as GaAs substrates, which reduces the economies of scale. Metamorphic devices fabricated on GaAs are capable of providing comparable performance to InP-based HEMTs but with the benefits of a GaAs substrate. This makes metamorphic GaAs HEMT technology ideally suited for the fabrication of millimetre- wave monolithic integrated circuits (M3ICs). These circuits require a technology that can produce active devices capable of operating at frequencies in excess of 100GHz with highly uniform characteristics across the wafer. In this work, uniformity improvements were achieved by modifying the gate resist stack. For relatively modest 120 nm gate length T-gates, it has been noted previously that the thickness of the gate resist plays a key role in the quality of the gate lithography.(3) The converntional resist stack for a PMMA/co-polymer T-gate consist of a tri-layer of PMMA/P(MMA/MAA)/PMMA. (4) The thickness of each of the three layer of the conventional resist stack were measured when spun within a source-drain gap using AFM The thickness of the upper layer of resist was twice as thick as the same resist spun on a planar substrate. This contributed to a total thickness of 550nm, which is 90nm thicker than on planar substrate. This layer was originally included to aidaid T-gate lift-off by providing a well defined undercut profile. In this work, the top layer of resist is ommited to provide a more uniform resist stack across the width of the device with no detremintal effects on the lift-off process. The reduction in resist thickness allows a highly uniform T-gate with a foot-print of 50nm to be realised. The gate recess etch was performed using a highly selective succinic acid based etch which stops on an In0.52Al0.48As etch stop layer therefore providing accurate control of the depth of the recess etch.

In this paper, we review advanced III-V HEMT device technologies for millimetre -wave applications, particularly targeted above 100 GHz. We demonstrate performance advantages in moving to self- aligned T-gate strategies in lattice matched InP HEMTs. For 120 nm gate lengths, we have obtained self-aligned, non-annealed Ohmi c contact devices with gm of 1450 mS/mm, fT of 220 GHz and fmax of 435 GHz. We will also present data on a high yield 50 nm T-gate process in the metamorphic GaAs material system utilizing non-selective digital wet etching with performance metrics including gm of 1500 mS/mm and fT of 350 GHz, to our knowledge, the fastest GaAs-based transistors reported to date.

By combining high resolution electron beam lithography, novel T-gate resist stacks, aggressively scaled vertical architectures and highly uniform, reproducible non- selective single "digital" gate recess etching techniques, we show it is possible to realise 50 nm gate length GaAs pHEMTs with fT of 200 GHz suitable for applications beyond 100 GHz. This shows that by properly optimising and controlling critical parameters in an aggressively scaled GaAs pHEMT technology, excellent mm-wave performance can be achieved without the need to move to metamorphic GaAs or InP HEMT solutions. I. INTRODUCTION High performance devices that operate in the millimeter wave (30 to 300 GHz) frequency ranges will be major elements of future communication systems. InP based InAlAs/InGaAs high electron mobility transistors (HEMTs) are highly regarded for these application areas as they offer intrinsic speed and noise performance advantages over GaAs pseudomorphic HEMT (pHEMT) devices for a given gate length. Compared to InP HEMTs, GaAs pHEMTs benefit from a more mature fabrication process, larger wafer sizes and reduced substrate costs for a given wafer diameter and thus greater economies of scale, and higher reliability. Clearly however, for GaAs pHEMTs to be competitive with InP- based devices, the baseline performance should be at least comparable. Due to the lower mobility and sheet electron density of GaAs pHEMTs materials, they must have shorter gate length to achieve the same cut-off frequency as InP HEMTs. One of the main challenges to realize short gate length devices is electron-beam lithography technology for T-gate fabrication. Conventional electron-beam lithography T-gate fabrication is commonly based on PMMA and related co-polymers(1,2). In such resist stacks there is a relatively limited difference in the electron beam sensitivity of the resists and this limits the ultimate cross-sectional dimensions of the T-gates (3). By contrast, UVIII is a Shipley DUV photoresist, which is almost five times more sensitive to electron beam exposure than PMMA thus enabling ultra-short footprint T-gates with larger cross sectional areas to be written at higher speeds (4). The increased cross-sectional area of the gate results in reduced DC and RF resistance/inductance of the gate electrodes giving the highest performance mm-wave devices. In this paper we report on the first published results of 50 nm T-gate devices made using bilayers of UVIII and PMMA resists and show that well scaled, optimised and highly engineered, reproducible, uniform 50 nm gate length GaAs pHEMTs have performance metrics that suggest they are well suited to applications beyoind 100 GHz.